17-03-2014, 10:53 AM
Abstract
In this paper, state-of-the-art reconfigurable
architectures are reviewed and their main drawbacks
in reaching TeraByte per second bandwidth is
identified. A concept of new adaptable architecture
for signal processing applications is proposed that
will enable TB/s processing in the future. Current
prototypes of smaller scale modules show groundbreaking
benefits in reaching the targeted goal.
1. Introduction
Advances in integrated circuits technology allow
hundreds of millions transistors to be integrated on a
single chip, providing increasing computational
capabilities. Multimedia and other computationintensive
digital data processing applications have
become dominant in consumer market in recent
years, changing the computer architecture research
from traditional desktop and server applications to
more diversified computing architectures
[1][2]. Besides dedicated programmable digital
signal processors (DSP), multimedia processors,
general-purpose processors (GPP) with multimedia
extensions and application specific integrated circuits
(ASIC), reconfigurable computer systems provide
more flexible solution for data-parallel and
computation-intensive digital signal processing and
multimedia applications with relative low cost and
high performance. This paper investigates the
distinguishing computing features of DSP and
multimedia applications and presents an overview of
hardware architectures targeting these computing
requirements. Finally, reconfigurable architectures
for DSP and multimedia applications are reviewed.
The advantages and disadvantages of the
reconfigurable architectures are clarified and a new
concept of an adaptable system for data-parallel
computation-intensive applications is proposed and
compared to previously proposed systems.
In this paper, state-of-the-art reconfigurable
architectures are reviewed and their main drawbacks
in reaching TeraByte per second bandwidth is
identified. A concept of new adaptable architecture
for signal processing applications is proposed that
will enable TB/s processing in the future. Current
prototypes of smaller scale modules show groundbreaking
benefits in reaching the targeted goal.
1. Introduction
Advances in integrated circuits technology allow
hundreds of millions transistors to be integrated on a
single chip, providing increasing computational
capabilities. Multimedia and other computationintensive
digital data processing applications have
become dominant in consumer market in recent
years, changing the computer architecture research
from traditional desktop and server applications to
more diversified computing architectures
[1][2]. Besides dedicated programmable digital
signal processors (DSP), multimedia processors,
general-purpose processors (GPP) with multimedia
extensions and application specific integrated circuits
(ASIC), reconfigurable computer systems provide
more flexible solution for data-parallel and
computation-intensive digital signal processing and
multimedia applications with relative low cost and
high performance. This paper investigates the
distinguishing computing features of DSP and
multimedia applications and presents an overview of
hardware architectures targeting these computing
requirements. Finally, reconfigurable architectures
for DSP and multimedia applications are reviewed.
The advantages and disadvantages of the
reconfigurable architectures are clarified and a new
concept of an adaptable system for data-parallel
computation-intensive applications is proposed and
compared to previously proposed systems.