17-03-2014, 05:38 PM
Abstract
In conventional avionics system design process,
changing the avionics system architecture involves a
large team of engineers and requires months to years
of redesign time. This paper describes the Avionics
Architecture Tool (AST) developed by JPL that can
automatically synthesize architecture for the avionicssystem-
on-a-chip. As the synthesis is based on Genetic
Algorithm and driven by requirements that are
imposed by the environment, the synthesized
architecture can quickly adapt to environmental
changes. Furthermore, the AST can also guarantee
that the synthesized architecture is viable and
workable through the use of Viability Tree.
1 Introduction
In conventional avionics system design process,
changing the avionics system architecture involves a
large team of engineers and requires months to years of
redesign time. In this paper, a technique that can
automatically synthesize avionics architecture is
proposed to reduce the cost and time of avionics
system design.
2 Architecture Synthesis Tool (AST)
Jet Propulsion Laboratory has developed an
Architecture Synthesis Tool (AST) to automatically
synthesize functionally viable avionics system
architectures for spacecraft, and the performance of the
generated architectures will guarantee to meet the user
requirements. The AST consists of two parts: an
Architecture Generator and a Functionality Evaluator.
The architecture generator utilizes a Genetic Algorithm
to create a multitude of avionics system architectures.
Then, the architectures are evaluated by the
Functionality Evaluator to ensure their viability. Most
of the non-viable architectures are abandoned. The
remaining architectures are further evaluated by the
selection process of the Genetic Algorithm. The final
output is a viable architecture that meets the functional
and performance requirements in the current
environment. This process is illustrated in Figure 1.
In conventional avionics system design process,
changing the avionics system architecture involves a
large team of engineers and requires months to years
of redesign time. This paper describes the Avionics
Architecture Tool (AST) developed by JPL that can
automatically synthesize architecture for the avionicssystem-
on-a-chip. As the synthesis is based on Genetic
Algorithm and driven by requirements that are
imposed by the environment, the synthesized
architecture can quickly adapt to environmental
changes. Furthermore, the AST can also guarantee
that the synthesized architecture is viable and
workable through the use of Viability Tree.
1 Introduction
In conventional avionics system design process,
changing the avionics system architecture involves a
large team of engineers and requires months to years of
redesign time. In this paper, a technique that can
automatically synthesize avionics architecture is
proposed to reduce the cost and time of avionics
system design.
2 Architecture Synthesis Tool (AST)
Jet Propulsion Laboratory has developed an
Architecture Synthesis Tool (AST) to automatically
synthesize functionally viable avionics system
architectures for spacecraft, and the performance of the
generated architectures will guarantee to meet the user
requirements. The AST consists of two parts: an
Architecture Generator and a Functionality Evaluator.
The architecture generator utilizes a Genetic Algorithm
to create a multitude of avionics system architectures.
Then, the architectures are evaluated by the
Functionality Evaluator to ensure their viability. Most
of the non-viable architectures are abandoned. The
remaining architectures are further evaluated by the
selection process of the Genetic Algorithm. The final
output is a viable architecture that meets the functional
and performance requirements in the current
environment. This process is illustrated in Figure 1.