18-03-2014, 11:24 AM
Microprocessors and Microcontrollers/Architecture of Microprocessors
[attachment=60169]
Minicomputer:
• A midsized computer. In size and power, minicomputers lie between workstations
and mainframes.
• A minicomputer, a term no longer much used, is a computer of a size intermediate
between a microcomputer and a mainframe.
• Typically, minicomputers have been stand-alone computers (computer systems
with attached terminals and other devices) sold to small and mid-size businesses
for general business applications and to large enterprises for department-level
operations.
• In recent years, the minicomputer has evolved into the "mid-range server" and is
part of a network. IBM's AS/400e is a good example.
• The AS/400 - formally renamed the "IBM iSeries," but still commonly known as
AS/400 - is a midrange server designed for small businesses and departments in
large enterprises and now redesigned so that it will work well in distributed
networks with Web applications.
• The AS/400 uses the PowerPC microprocessor with its reduced instruction set
computer technology. Its operating system is called the OS/400.
• With multi-terabytes of disk storage and a Java virtual memory closely tied into
the operating system, IBM hopes to make the AS/400 a kind of versatile all-
purpose server that can replace PC servers and Web servers in the world's
businesses, competing with both Wintel and Unix servers, while giving its present
enormous customer base an immediate leap into the Internet.
Workstation:
1) A type of computer used for engineering applications (CAD/CAM), desktop
publishing, software development, and other types of applications that require a
moderate amount of computing power and relatively high quality graphics
capabilities.
Characteristics of Digital Signal Processors:
• Separate program and data memories (Harvard architecture).
• Special Instructions for SIMD (Single Instruction, Multiple Data) operations.
• Only parallel processing, no multitasking.
• The ability to act as a direct memory access device if in a host environment.
• Takes digital data from ADC (Analog-Digital Converter) and passes out data
which is finally output by converting into analog by DAC (Digital-Analog
Converter).
A MAC unit with accumulator guard bits
The processor core connects to these memory spaces by two separate bus sets,
allowing two simultaneous access to memory. This arrangement doubles the
processor memory bandwidth.
Zero-overhead looping: one common characteristics of DSP algorithms is that
most of the processing time is split on executing instructions contained with
relatively small loops.
The term zero overhead looping means that the processor can execute loops
without consuming cycles to test the value of the loop counter, perform a
conditional branch to the top of the loop, and decrement the loop counter.
EXECUTION UNIT
The Execution unit is responsible for decoding and executing all instructions.
•The EU extracts instructions from the top of the queue in the BIU, decodes them,
generates operands if necessary, passes them to the BIU and requests it to perform the
read or write bys cycles to memory or I/O and perform the operation specified by the
instruction on the operands.
•During the execution of the instruction, the EU tests the status and control flags and
updates them based on the results of executing the instruction.
•If the queue is empty, the EU waits for the next instruction byte to be fetched and shifted
to top of the queue.
•When the EU executes a branch or jump instruction, it transfers control to a location
corresponding to another set of sequential instructions.
•Whenever this happens, the BIU automatically resets the queue and then begins to fetch
instructions from this new location to refill the queue.
Memory segment status codes.
•Control Signals:
The control signals are provided to support the 8086 memory I/O interfaces. They
control functions such as when the bus is to carry a valid address in which direction data
are to be transferred over the bus, when valid write data are on the bus and when to put
read data on the system bus.
•ALE is a pulse to logic 1 that signals external circuitry when a valid address word is on
the bus. This address must be latched in external circuitry on the 1-to-0 edge of the pulse
at ALE.
•Another control signal that is produced during the bus cycle is BHE bank high enable.
Logic 0 on this used as a memory enable signal for the most significant byte half of the
data bus D8 through D1. These lines also serves a second function, which is as the S7
status line.
•Using the M/IO and DT/R lines, the 8086 signals which type of bus cycle is in progress
and in which direction data are to be transferred over the bus.
•The logic level of M/IO tells external circuitry whether a memory or I/O transfer is
taking place over the bus. Logic 1 at this output signals a memory operation and logic 0
an I/O operation.
[attachment=60169]
Minicomputer:
• A midsized computer. In size and power, minicomputers lie between workstations
and mainframes.
• A minicomputer, a term no longer much used, is a computer of a size intermediate
between a microcomputer and a mainframe.
• Typically, minicomputers have been stand-alone computers (computer systems
with attached terminals and other devices) sold to small and mid-size businesses
for general business applications and to large enterprises for department-level
operations.
• In recent years, the minicomputer has evolved into the "mid-range server" and is
part of a network. IBM's AS/400e is a good example.
• The AS/400 - formally renamed the "IBM iSeries," but still commonly known as
AS/400 - is a midrange server designed for small businesses and departments in
large enterprises and now redesigned so that it will work well in distributed
networks with Web applications.
• The AS/400 uses the PowerPC microprocessor with its reduced instruction set
computer technology. Its operating system is called the OS/400.
• With multi-terabytes of disk storage and a Java virtual memory closely tied into
the operating system, IBM hopes to make the AS/400 a kind of versatile all-
purpose server that can replace PC servers and Web servers in the world's
businesses, competing with both Wintel and Unix servers, while giving its present
enormous customer base an immediate leap into the Internet.
Workstation:
1) A type of computer used for engineering applications (CAD/CAM), desktop
publishing, software development, and other types of applications that require a
moderate amount of computing power and relatively high quality graphics
capabilities.
Characteristics of Digital Signal Processors:
• Separate program and data memories (Harvard architecture).
• Special Instructions for SIMD (Single Instruction, Multiple Data) operations.
• Only parallel processing, no multitasking.
• The ability to act as a direct memory access device if in a host environment.
• Takes digital data from ADC (Analog-Digital Converter) and passes out data
which is finally output by converting into analog by DAC (Digital-Analog
Converter).
A MAC unit with accumulator guard bits
The processor core connects to these memory spaces by two separate bus sets,
allowing two simultaneous access to memory. This arrangement doubles the
processor memory bandwidth.
Zero-overhead looping: one common characteristics of DSP algorithms is that
most of the processing time is split on executing instructions contained with
relatively small loops.
The term zero overhead looping means that the processor can execute loops
without consuming cycles to test the value of the loop counter, perform a
conditional branch to the top of the loop, and decrement the loop counter.
EXECUTION UNIT
The Execution unit is responsible for decoding and executing all instructions.
•The EU extracts instructions from the top of the queue in the BIU, decodes them,
generates operands if necessary, passes them to the BIU and requests it to perform the
read or write bys cycles to memory or I/O and perform the operation specified by the
instruction on the operands.
•During the execution of the instruction, the EU tests the status and control flags and
updates them based on the results of executing the instruction.
•If the queue is empty, the EU waits for the next instruction byte to be fetched and shifted
to top of the queue.
•When the EU executes a branch or jump instruction, it transfers control to a location
corresponding to another set of sequential instructions.
•Whenever this happens, the BIU automatically resets the queue and then begins to fetch
instructions from this new location to refill the queue.
Memory segment status codes.
•Control Signals:
The control signals are provided to support the 8086 memory I/O interfaces. They
control functions such as when the bus is to carry a valid address in which direction data
are to be transferred over the bus, when valid write data are on the bus and when to put
read data on the system bus.
•ALE is a pulse to logic 1 that signals external circuitry when a valid address word is on
the bus. This address must be latched in external circuitry on the 1-to-0 edge of the pulse
at ALE.
•Another control signal that is produced during the bus cycle is BHE bank high enable.
Logic 0 on this used as a memory enable signal for the most significant byte half of the
data bus D8 through D1. These lines also serves a second function, which is as the S7
status line.
•Using the M/IO and DT/R lines, the 8086 signals which type of bus cycle is in progress
and in which direction data are to be transferred over the bus.
•The logic level of M/IO tells external circuitry whether a memory or I/O transfer is
taking place over the bus. Logic 1 at this output signals a memory operation and logic 0
an I/O operation.