27-07-2012, 02:34 PM
Optimization of Power Consumption in VLSI Circuit
Optimization of Power .pptx (Size: 239.41 KB / Downloads: 39)
Power minimization Methods
Reducing chip area and package capacitance.
Scaling the supply voltage.
Employing better design techniques.
Using power management strategies.
CAD Algorithm:
Physical design Automation
Circuit partitioning
Node clustering
Floor planning
Placement
Global routing
Transistor reordering
Power Distribution
Floor planning
Floor planning is the process of assigning shapes, pin positions and locations to a set of macro-cells or modules so as to minimize the area of the floor plan
Power Distribution
As the supply voltage is reduced, the noise margins are diminished, thus, small voltage drop in the power distribution may have a relatively big impact on the circuit speed.