19-07-2014, 03:39 PM
Finite State Machines
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Finite State Machines
•
Any Circuit with Memory Is a Finite State
Machine
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Even computers can be viewed as huge FSMs
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Design of FSMs Involves
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Defining states
•
Defining transitions between states
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Optimization / minimization
•
Above Approach Is Practical for Small
FSMs Only
Moore vs. Mealy FSM (1)
•
Moore and Mealy FSMs Can Be
Functionally Equivalent
•
Equivalent Mealy FSM can be derived from
Moore FSM and vice versa
•
Mealy FSM Has Richer Description and
Usually Requires Smaller Number of States
•
Smaller circuit area
FSMs in VHDL
•
Finite State Machines Can Be Easily
Described With Processes
•
Synthesis Tools Understand FSM
Description If Certain Rules Are Followed
•
State transitions
should be described
in a
process
sensitive to
clock
and
asynchronous
reset
signals
only
•
Outputs
described
as concurrent statements
outside the process
Types of State Encodings (1)
•
Binary –
S
tate Encoded as a Binary
Number
•
Small number of used flip-flops
•
Potentially complex transition functions leading
to slow implementations
•
One-Hot –
O
nly One Bit Is Active
•
Number of used flip-flops as big as number of
states
•
Simple and fast transition functions
•
Preferable coding technique in FPGAs