29-08-2014, 02:28 PM
The Finite Impulse Response (FIR) filter bank is a digital filter bank widely used in Digital Signal Processing applications in various fields like imaging, instrumentation, communications, etc. Programmable digital processors signal (PDSPs) can be used in implementing the FIR filter. It is the combination of lowpass , highpass , bandpass , bandstop filters. However, in realizing a large-order filter many complex computations are needed which affects the performance of the common digital signal processors in terms of speed, cost, flexibility, etc. The FIR filter implementation in FPGA, utilizing the dedicated hardware resources can effectively achieve application-specific integrated circuit (ASIC)-like performance while reducing development time cost and risks. In this a low-pass, band pass and high pass FIR filter is implemented on FPGA. Direct-form approach in realizing a digital filter is considered. This approach gives a better performance than the common filter structures in terms of speed of operation, cost, and power consumption in real-time. The FIR filter is implemented in V
FIR Filter banks are arrangements of low pass, bandpass, bandstop and highpass filters used for the spectral decomposition and composition of signals. They play an important role in many modern signal processing applications such as audio and image coding. The reason for their popularity is the fact that they easily allow the extraction of spectral components of a signal while providing very efficient implementations. FIR digital filters are attractive for design of speech filter banks because such filters can be designed to have precisely linear phase simply by imposing the constraint h(n) =h(N-1-n) 0 <= n <=N-1 We design the hardware of different FIR filter that are used in filter bank. These filters are design by using two window techniques i.e hamming window and Kaiser window. These filters are designed from 1 to 25 order. We can choose any order between 1 to 25. we are using Direct structures for the Digital filter are those in which the real filter coefficients appear as multipliers and then add with adder. There are some steps to follows first we have to calculate the specification of filter: sampling frequency is 2000hz,order 1 to 25th by using hamming window & kaiser window by coding in matlab. Secondly choose the filter structure that is direct form of structure .Thirdly, implementation on the FPGA. basically it is software design basics on the hardware and we are work on symmetric type II so, in this type high pass & bandstop filter are not design for odd order because nyquist frequency become zero. In this, the lowpass, bandpass ,bandstop and highpass filters are simulation on modelsim. The filter specifications are real world and windowing method are used to design the filter coefficients. These coefficients further used to design Filters. Here we are using two windows to simulate the filter on modelsim i.e hamming window & Kaiser window having 1 to 25 order.. The FIR filter is implemented in Vertex XC6VLX75T FPGA and simulated with the help of Modelsim. Software WEBPACK project navigator 14.6i was used for synthesizing .Codes for direct form FIR filter have been realized. Modules such as multiplier, adder were used. For an N order filter the number of shift register and adders required is N and the number of multipliers required is N+1. These filters can work in real time.