18-03-2011, 04:17 PM
Hi, please mail me d ppt for chameleon chips to keepsmiling0091[at]gmail.com
18-03-2011, 04:17 PM
Hi, please mail me d ppt for chameleon chips to keepsmiling0091[at]gmail.com
25-03-2011, 02:12 PM
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D.CHANDANA Chameleon Chip.doc (Size: 122.5 KB / Downloads: 65) ABSTRACT Chameleon chips are chips whose circuitry can be tailored specifically for the problem at hand. Chameleon chips would be an extension of what can already be done with field-programmable gate arrays (FPGAS). An FPGA is covered with a grid of wires. At each crossover, there's a switch that can be semipermanently opened or closed by sending it a special signal. Usually the chip must first be inserted in a little box that sends the programming signals. But now, labs in Europe, Japan, and the U.S. are developing techniques to rewire FPGA-like chips anytime--and even software that can map out circuitry that's optimized for specific problems. The chips still won't change colors. But they may well color the way we use computers in years to come. It is a fusion between custom integrated circuits and programmable logic.in the case when we are doing highly performance oriented tasks custom chips that do one or two things spectacularly rather than lot of things averagely is used. Now using field programmed chips we have chips that can be rewired in an instant. Thus the benefits of customization can be brought to the mass market. INTRODUCTION Today's microprocessors sport a general-purpose design which has its own advantages and disadvantages. Adv: One chip can run a range of programs. That's why you don't need separate computers for different jobs, such as crunching spreadsheets or editing digital photos Disadv: For any one application, much of the chip's circuitry isn't needed, and the presence of those "wasted" circuits slows things down. Suppose, instead, that the chip's circuits could be tailored specifically for the problem at hand--say, computer-aided design--and then rewired, on the fly, when you loaded a tax-preparation program. One set of chips, little bigger than a credit card, could do almost anything, even changing into a wireless phone. The market for such versatile marvels would be huge, and would translate into lower costs for users. So computer scientists are hatching a novel concept that could increase number-crunching power--and trim costs as well. Call it the chameleon chip. Chameleon chips would be an extension of what can already be done with field-programmable gate arrays (FPGAS). An FPGA is covered with a grid of wires. At each crossover, there's a switch that can be semipermanently opened or closed by sending it a special signal. Usually the chip must first be inserted in a little box that sends the programming signals. But now, labs in Europe, Japan, and the U.S. are developing techniques to rewire FPGA-like chips anytime--and even software that can map out circuitry that's optimized for specific problems. The chips still won't change colors. But they may well color the way we use computers in years to come. it is a fusion between custom integrated circuits and programmable logic. in the case when we are doing highly performance oriented tasks custom chips that do one or two things spectacularly rather than lot of things averagely is used. Now using field programmed chips we have chips that can be rewired in an instant. Thus the benefits of customization can be brought to the mass market. A reconfigurable processor is a microprocessor with erasable hardware that can rewire itself dynamically. This allows the chip to adapt effectively to the programming tasks demanded by the particular software they are interfacing with at any given time. Ideally, the reconfigurable processor can transform itself from a video chip to a central processing unit (cpu) to a graphics chip, for example, all optimized to allow applications to run at the highest possible speed. The new chips can be called a "chip on demand." In practical terms, this ability can translate to immense flexibility in terms of device functions. For example, a single device could serve as both a camera and a tape recorder (among numerous other possibilities): you would simply download the desired software and the processor would reconfigure itself to optimize performance for that function. Reconfigurable processors, competing in the market with traditional hard-wired chips and several types of programmable microprocessors. Programmable chips have been in existence for over ten years. Digital signal processors (DSPs), for example, are high-performance programmable chips used in cell phones, automobiles, and various types of music players. Another version, programmable logic chips are equipped with arrays of memory cells that can be programmed to perform hardware functions using software tools. These are more flexible than the specialized DSP chips but also slower and more expensive. Hard-wired chips are the oldest, cheapest, and fastest - but also the least flexible - of all the options. CHAMELEON CHIPS Highly flexible processors that can be reconfigured remotely in the field, Chameleon's chips are designed to simplify communication system design while delivering increased price/performance numbers. The chameleon chip is a high bandwidth reconfigurable communications processor (RCP).it aims at changing a system's design from a remote location. This will mean more versatile handhelds. Processors operate at 24,000 16-bit million operations per second (MOPS), 3,000 16-bit million multiply-accumulates per second (MMACS), and provide 50 channels of CDMA2000 chip-rate processing. The 0.25-micron chip, the CS2112 is an example. These new chips are able to rewire themselves on the fly to create the exact hardware needed to run a piece of software at the utmost speed. an example of such kind of a chip is a chameleon chip.this can also be called a “chip on demand” “Reconfigurable computing goes a step beyond programmable chips in the matter of flexibility. It is not only possible but relatively commonplace to "rewrite" the silicon so that it can perform new functions in a split second. Reconfigurable chips are simply the extreme end of programmability.” The overall performance of the ACM can surpass the DSP because the ACM only constructs the actual hardware needed to execute the software, whereas DSPs and microprocessors force the software to fit its given architecture. One reason that this type of versatility is not possible today is that handheld gadgets are typically built around highly optimized specialty chips that do one thing really well. These chips are fast and relatively cheap, but their circuits are literally written in stone -- or at least in silicon. A multipurpose gadget would have to have many specialized chips -- a costly and clumsy solution. Alternately, you could use a general-purpose microprocessor, like the one in your PC, but that would be slow as well as expensive. For these reasons, chip designers are turning increasingly to reconfigurable hardware—integrated circuits where the architecture of the internal logic elements can be arranged and rearranged on the fly to fit particular applications. Designers of multimedia systems face three significant challenges in today's ultra-competitive marketplace: Our products must do more, cost less, and be brought to the market quicker than ever. Though each of these goals is individually attainable, the hat trick is generally unachievable with traditional design and implementation techniques. Fortunately, some new techniques are emerging from the study of reconfigurable computing that make it possible to design systems that satisfy all three requirements simultaneously. Although originally proposed in the late 1960s by a researcher at UCLA, reconfigurable computing is a relatively new field of study. The decades-long delay had mostly to do with a lack of acceptable reconfigurable hardware. Reprogrammable logic chips like field programmable gate arrays (FPGAs) have been around for many years, but these chips have only recently reached gate densities making them suitable for high-end applications. (The densest of the current FPGAs have approximately 100,000 reprogrammable logic gates.) With an anticipated doubling of gate densities every 18 months, the situation will only become more favorable from this point forward. The primary product is a groundstation equipment for satellite communications. This application involves high-rate communications, signal processing, and a variety of network protocols and data formats. ADVANTAGES AND APPLICATIONS Its applications are in, data-intensive Internet DSP wireless basestations voice compression software-defined radio high-performance embedded telecom and datacom applications xDSL concentrators fixed wireless local loop multichannel voice compression multiprotocol packet and cell processing protocols Its advantages are can create customized communications signal processors increased performance and channel count can more quickly adapt to new requirements and standards lower development costs and reduce risk.
28-03-2011, 09:35 AM
chameleonchipppt.ppt (Size: 1.18 MB / Downloads: 86) 1.Introduction A reconfigurable processor is a microprocessor with erasable hardware that can rewire itself dynamically. This allows the chip to adapt effectively to the programming tasks demanded by the particular software they are interfacing with at any given time. Reconfigurable processor chip usually contains several parallel processing computational units known as functional blocks. While reconfiguring the chip, the connections inside the functional blocks and the connections in between the functional blocks are changing, that means when a particular software is loaded the present hardware design is erased and a new hardware design is generated by making a particular number of connections active while making others idle. This will define the optimum hardware configuration for that particular software. It takes just 20 microseconds to reconfigure the entire processing array. Reconfigurable processors are currently available from Chameleon Systems, Billions of Operations (BOPS), and PACT (Parallel Array Computing Technology). Among those only Chameleon is providing a design environment, which allows customers to convert their algorithms to hardware configuration by themselves. 2.Multifunction Implementation In a conventional ASIC or FPGA, multiple algorithms are implemented as separate hardware modules. Four algorithms would divide the chip into four functional areas. With Reconfigurable Technology, the four algorithms are loaded into the entire reconfigurable Fabric one at a time. First, the entire Fabric is dedicated to algorithm 1; during this processing time, algorithm 2 is loaded into the background place. In a single clock cycle, the entire Fabric is swapped to algorithm 2; during this processing time, algorithm 3 is loaded into the background plane. The entire reconfigurable fabric is dedicated to just one algorithm at a time. So finally the result is: much higher performance, lower cost and lower power consumption 3.The General Architecture Of Reconfigurable Processor Machine design supposes that some pins are considered as the configuration inputs and another as data or control inputs and outputs. A new chip must inside determine the set of the function blocks (FB), which are used to construct the circuit, rules of their interconnections and ways of the input/output connections. The most important parts are the logic circuits, which configure function blocks according to data in the configuration memory. The various possible connections between functional blocks are encoded to bits known as Configuration bits. Resulting configuration stream is downloaded into configuration memory through configuration inputs. Thus, a new Reconfigurable machine is established. 4.Architecture Components: 32-bit Risc ARC processor @125MHz 64 bit memory controller 32 bit PCI controller reconfigurable processing fabric (RPF) high speed system bus programmable I/O (160 pins) DMA Subsystem Configuration Subsystem 5.Reconfigurable Processing Fabric(RPF) The Fabric provides unmatched algorithmic computation power to Chameleon Chip. It consists of 84,32-bit Data path Units and 24, 16×24-bit Multipliers,Operating at 125Mhz, they provide up to 3,000 16-bit Million Multiply-Accumulates Per Second and 24,000 16-bit Million Operations Per Second. The fabric is divided into Slices, the basic unit of reconfiguration. The CS2112 has 4 Slices with 3 Tiles in each. Each tile can be reconfigured at runtime Tiles contain : Datapath Units Local Store Memories 16x24 multipliers Control Logic Unit The high-performance 32bit Data path Unit (DPU): The Tile includes seven Data path Units. The DPU is a data processing module that directly supports all C and Verilog operations. 6.Programmable I/O RCP includes banks of Programmable I/O (PIO) pins which provide tremendous bandwidth. Each PIO bank of 40 PIO pins delivers 0.5 GBytes/sec I/O bandwidth. 7.Technologies Used In Chip 1. eCONFIGURABLE™ TECHNOLOGY: This technology reconfigures fabric in one clock cycle and increases voice/data/video channels per chip. As mentioned earlier, each Slice can be configured independently. Loading the Background Plane from external memory requires just 3 µsec per Slice; this operation does not interfere with active processing on the Fabric. Swapping the Background Plane into the Active Plane requires just one clock cycle. with eConfigurable Technology; the four algorithms are loaded into the entire reconfigurable processing Fabric one at a time.
01-03-2012, 02:33 PM
to get information about the topic chameleon chip full report ppt and related topic refer the link bellow
https://seminarproject.net/Thread-chamel...d-abstract https://seminarproject.net/Thread-chameleon-chips https://seminarproject.net/Thread-chamel...7#pid42247 https://seminarproject.net/Thread-chamel...?pid=40997
25-07-2012, 01:43 PM
i want the report of camalion chip abstract
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