25-08-2017, 09:32 PM
Optimization of Delta-Sigma ADC for Column-Level Data Conversion in CMOS Image Sensors
IMTC_2007_MJ.ppt (Size: 553.5 KB / Downloads: 35)
Solution (delta-sigma ADC)
Unlike Nyquist rate ADCs, oversampled ADCs (delta-sigma ADC) can filter the temporal noise in array sensors, achieving higher SNR.
Delta-sigma ADC is very tolerant to nonidealities of CMOS circuits.
Flexibility of trading the number of bits-per-pixel, with the frame rate in delta-sigma ADC is another advantage.
A few works have designed the DS-ADC for column or pixel level but with large power and area usage.
Main issue of DS-ADC is power consumption and area usage which should be minimized (subject of this work).
ADC structure in image sensors
Chip level ADC (One ADC for all of the pixels)
High spatial resolution
But, high noise, high power, fast ADC is needed,
Pixel level ADC (One ADC for each pixel or group of pixels)
Low noise, low speed ADC is needed, low power
But, low spatial resolution, high FPN.
Column level ADC (One ADC for each column or group of columns)
A compromise between pixel level and chip level.
In this work a first-order column-level delta-sigma ADC will be designed.
Operational Transconductance Amplifier
OTA is the most critical Component
Folded-cascode OTA structure with gain boosting was used.
DDA-CMFB circuit.
OTA needs a common-mode feedback (CMFB) circuit .
(1) Switched capacitor CMFB
It has large swing and linearity.
Loads the output of the OTA, reducing its UGB and SLR.Large area is needed
(2) We used a differential-difference amplifier CMFB (DDA-CMFB).
It can offer enough swing and linearity with very small area.