14-08-2012, 04:34 PM
Bit slicing
Intel 3000 bit-slice processor family was introduced in 1973. The family includes components that can be used to build microprocessors with data width in increments of two, i.e. 2-bit, 4-bit, 6-bit microprocessors, and so on. One of the main components of the 3000 family is Intel 3002 Central Processing Element (CPE). The 3002 CPE is a 2-bit ALU and register file that can perform logical and arithmetic operations, left/right shifting and bit/zero value testing. The 3002 also includes 11 registers and an accumulator. Multiple 3002 CPE elements can be chained together to process 4-bit or wider data. The 3002 CPE elements do not fetch instructions from memory - it's a task of Intel 3001 Microprogram Controller Unit (MCU). The 3001 MCU can address up to 512 words of program memory, and it provides a way to conditionally or unconditionally jump to some memory locations. The 512-word memory is viewed by the 3001 element as 32 rows by 16 columns matrix. The MCU can jump to row 0, to any column within current row, any row within current column, or to any location within a subset of columns/rows, but not to any arbitrary location. Other function of the 3001 chip is to control carry input/output logic of the array of CPE elements.
The only second-source manufacturer of 3000 components was Signetics. Czechoslovakia and USSR cloned Intel 3002, 3001 and other chips from 3000 family.
Die pictures:
Intel D3001 Signetics N3002I
Bit slicing is a technique for constructing a processor from modules of smaller bit width. Each of these components processes one bit field or "slice" of an operand. The grouped processing components would then have the capability to process the chosen full word-length of a particular software design. Bit slice processors usually consist of an arithmetic logic unit (ALU) of 1, 2, 4 or 8 bits and control lines (including carry or overflow signals that are internal to the processor in non-bitsliced designs). For example, two 4-bit ALUs could be arranged side by side, with control lines between them, to form an 8-bit,16-bit,32-bit words (so the designer can add as many slices he wants to make it to manipulate longer words lengths). A microsequencer or Control ROM would be used to execute logic to provide data and control signals to regulate function of the component ALUs. Examples of bit-slice microprocessor modules can be seen in the Intel 3000 family, the AMD's Am2900 family the National Semiconductor IMP-16 and IMP-8 family, and the 74181.
bit slice - A technique for constructing a processor from modules, each of which processes one bit-field or "slice" of an operand. Bit slice processors usually consist of an ALU of 1, 2, 4 or 8 bits and control lines (including carry or overflow signals usually internal to the CPU). For example, two 4-bit ALUs could be arranged side by side, with control lines between them, to form an 8-bit ALU. A sequencer executes a program to provide data and control signals.
The AMD Am2901 is an example.
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bit slice processor
An earlier logic chip used as a building block for CPUs. Bit slice processors used arithmetic logic units (ALUs) that typically came in 4-bit increments, although 1- and 2-bit devices were also made. Connected to a control unit, the ALU slices were strung together to make larger processors (8-bit, 16-bit, etc.). They included inputs and outputs for borrow and carry bits (addition and subtraction require carrying to and borrowing from the digit on the left).
In the early days of microprocessors, bit slice processors enabled larger CPUs to be built from off-the-shelf components, and products were made by AMD, Intel and National Semiconductor in the mid-1970s. Most notable was AMD's 2900 family of integrated circuits used in CPUs from Digital and others, which included the Am2901 4-bit slice ALU. See ALU.
Bit slicing is a technique for constructing a processor from modules of smaller bit width. Each of these components processes one bit field or "slice" of an operand. The grouped processing components would then have the capability to process the chosen full word-length of a particular software design.
Operational details
Bit slice processors usually consist of an arithmetic logic unit (ALUoh) of 1, 2, 4 or 8 bits and control lines (including carry or overflow signals that are internal to the processor in non-bitsliced designs).
For example, two 4-bit ALUs could be arranged side by side, with control lines between them, to form 8-bit, 16-bit, or 32-bit words (so the designer can add as many slices he wants to make it to manipulate longer word lengths).
A microsequencer or Control ROM would be used to execute logic to provide data and control signals to regulate function of the component ALUs. Examples of bit-slice microprocessor modules can be seen in the Intel 3000 family, the AMD's Am2900 family, the National Semiconductor IMP-16 and IMP-8 family, and the 74181.
Historical necessity
Bit slicing (although it was not called that) was also used in computers before integrated circuits. The first bit-sliced machine was EDSAC 2, built at the University of Cambridge Mathematical Laboratory in 1956-8.
Before the era of modern computers (mid-1970s through late 1980s) there was some debate over how much bus width was necessary in a given computer system to make it function. Silicon chip technology and parts were generally much more expensive than today. Using multiple simpler (and cheaper) ALUs was seen as a way to increase computing power in a cost effective manner. 32-bit architectures were being discussed but few were in production.
At the time 16-bit processors were common but expensive, and 8-bit processors, such as the Z80, were widely used in the nascent home computer market.
Combining components to produce bit slice products allowed engineers and students to create more powerful and complex computers at a more reasonable cost, using off-the-shelf components that could be custom-configured. The complexities of creating a new computer architecture were greatly reduced when the details of the ALU were already specified (and debugged).
The main advantage in the late 60's to mid 80's was that bit slicing made it economically possible in smaller processors to use bipolar transistors, which switch much faster than NMOS or CMOS transistors. This allowed for much higher clockrates, for applications where speed was needed; for example DSP functions or matrix transformation, or as in the Xerox Alto, the combination of flexibility and speed, before discrete CPUs were able to deliver that.
Modern use
In more recent times, the term bitslicing was re-coined by Matthew Kwan [1] to refer to the technique of using a general purpose CPU to implement multiple parallel simple virtual machines using general logic instructions to perform Single Instruction Multiple Data operations. This technique is also known as SWAR, SIMD Within A Register.
This was initially in reference to Eli Biham's 1997 paper A Fast New DES Implementation in Software,[2] which achieved significant gains in performance of DES by using this method.