14-01-2014, 04:07 PM
FPGA Circuits
What are Programmable Chips?
As compared to hard-wired chips, programmable chips can be customized as per needs of the user by programming
This convenience, coupled with the option of re-programming in case of problems, makes the programmable chips very attractive
Other benefits include instant turnaround, low starting cost and low risk
As compared to programmable chips, ASIC (Application Specific Integrated Circuit) has a longer design cycle and costlier ECO (Engineering Change Order)
Still, ASIC has its own market due to the added benefit of faster performance and lower cost if produced in high volume
Programmable chips are good for medium to low volume products. If you need more than 10,000 chips, go for ASIC or hard copy
What is Available?
PLA (Programmable Logic Array) is a simple field programmable chip that has an AND plane followed by an OR plane. It is based on the fact that any logical function can be written in SOP (Sum of Products) form thus any function can be implemented by AND gates generating products which feed to an OR gate that sums them up
Nios: The processor in software
Altera has implemented a full 16/32 bit RISC processor in HDL (Hardware Description Language)
Nios is a processor core that is available as a megafunction in Quartus and it can be targeted for all Altera FPGA’s
Programs can be written for Nios using open GNU pro tools
FPGA structure
Additionally to the previous array express buses are needed
The most modern FPGA architectures provide some kind of special long distance routing
The cell architecture is comprised of a function unit that can assume any two input logic function, a 2:1 multiplexer, or a D-type flip-flop
Reset and clear signals are routed to each cell
The function unit can also implement
an inverter as well as the identity function