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Retinal Implantation:
A retinal implant is a biomedical implant technology currently being devel-oped by a number of private companies and research institutions worldwide. The rst application of an implantable stimulator for vision restoration was developed by Drs. Brindley and Lewin in 1968. The implant is meant to partially restore useful vision to people who have lost their vision. There are two types of retinal implants namely epiretinal implant and subretinal implant.
Epiretinal Implant:
Epiretinal implants sit in the inner surface of the retina. They are advanta-geous as they bypass a large portion of the retina. It could provide visual perception to individuals with retinal diseases extending beyond the photo-receptor layer. The implants receive input from a camera and processing Unit (E.g. on glasses). Electrodes from the implants electrically stimulate the ganglion cells and axons at the start of the optic nerve.
Sub retinal Implant:
Sub retinal implants sit on the outer surface of the retina, between the pho-toreceptor layer and the retinal pigment epithelium, directly stimulating reti-nal cells and relying on the normal processing of the inner and middle retinal layers. It has a simpler design .It replace damaged rods and cones by Silicon plate carrying 1000s of light-sensitive micro photodiodes each with a stimulation electrode. Light from image activates the micro photodiodes, the electrodes inject currents into the neural cells.
Among the above implant methods, the epiretinal implant has features that the image resolution can be high because the stimulus signal can be directly conducted to neuron cells and that living retinas are not seriously damaged. Trade o for the two types is that, sub retinal Implant uses the entire retina (except the rods/cones). Epiretinal Implant does not; it must replace the function of entire retina and convert light to neural code. But the input to the Epiretinal Implant is more easily controlled (external camera).
ARTIFICIAL RETINA
USING THIN FILM
TRANSISTORS
Operation
Artificial Retina using Thin-Film Transistors (TFTs) is fabricated on trans-parent and flexible substrates; it uses the same fabrication processes as conventional poly-Si TFTs and encapsulated using SiO2, in order to perform in corrosive environments. Although the artificial retina is fabricated on the glass substrate here to confirm the elementary functions, it can be fabricated on the plastic substrate.
The retina array includes matrix-like multiple retina pixels. Although large contact pads are located for fundamental evaluation, a principal part is 27 300 cm2, which corresponds to 154 ppi. The retina pixel consists of a photo transistor, current mirror, and load resistance. The photo transis-tor is optimized to achieve high e ciency, and the current mirror and load resistance are designed by considering the transistor characteristic of TFTs. The photosensitivity of the reverse-biased p/i/n poly-Si phototransistor is 150 pA at 1000 lx for white light and proper values for all visible color lights. The eld e ect mobility and the threshold voltage of the n-type and p-type
poly-Si TFT were 93 cm2 V -1s-1 , 3.6 V, 47 cm2 V -1s-1 and -2.9 V, re-spectively. First, the photo transistors perceive the irradiated light (Lphoto) and induce the photo-induced current (Iphoto). Next, the current mirror ampli es Iphoto to the mirror current (Imirror). Finally, the load resistance converts Imirror to the output voltage (Vout). Consequently, the retina pix-els irradiated with bright light output a higher Vout, whereas the retina pixels irradiated with darker light output a lower Vout.
Electronic photo devices and circuits are integrated on the artificial retina, which is implanted on the inside surface of the living retina at the back part of the human eyeballs. Since the irradiated light comes from one side of the artificial retina and the stimulus signal goes out of the other side, the transparent substrate is preferable. The concept model of the artificial retina fabricated on a transparent and flexible substrate and implanted using epiretinal implant
Fabrication of thin film phototransistors
Low temperature poly-Si TFTs have been developed in order to fabricate active matrix LCDs with integrated drivers on large glass substrates. For integrated drivers, CMOS configurations are indispensable. Self-aligned TFTs are also required because of their small parasitic capacitances which can realize high speed operation. Since ion implantation is one of the key factors in fabricating such as TFTs and CMOS configurations, several non-mass-separated I/D techniques are proposed. These techniques, however, are not suitable for conventional poly-Si TFT processes and cannot be applied to large glass substrates, especially those over 300 mm square.
2.2.1 ION Doping Techniques
Figure 2.3 shows a schematic diagram of the new I/D system which is one of the non-mass-separated implanters. 5 percent PH3 or 5 percent B2H6 diluted by hydrogen is used for the doping gas and an RF plasma is formed in the chamber by RF power with a frequency of 13.56 MHz
Ions from discharged gas are accelerated by an extraction electrode and an acceleration electrode and are implanted into the substrate. Main features of this system are:
1) A large beam area (over 300 mm square)
2)A high accelerating voltage (maximum: 110 KeV)
With this system, impurities can be implanted over the entire 300 mm square substrate with a maximum accelerating voltage of over 110 KeV which is su cient for implanting impurities through the 150nm SiO2 gate insulator. On the other hand, the conventional non-mass-separated I/D techniques are severely limited in beam area, which is about 150 mm in diameter. Further-more, they are incapable of implanting impurities through the gate insulator
since the accelerating voltages are less than 10 KeV. Consequently, the gate insulator must be removed prior to implantation, which can result in failure from surface contamination or breakdown between gate electrodes and source and drain regions.
2.2.1.1 Self Aligned structure and TFT charecteristics
S/A TFTs and non-S/A TFTs with 25 nm thick as-deposited channel poly-Si r31 were fabricated on the glass substrates, and the new I/D technique was used to achieve a self-aligned structure. Schematic cross sectional views of a S/A TFT and a non-S/A TFT are illustrated in Figure 2.4(a) and 2.4(b), respectively. Since the parasitic capacitance between the gate electrode and source and drain regions of a S/A TFT is estimated to be only about 2 -5 percent that of a non-S/A TFT, high speed operation can be expected.
The characteristics of S/A TFTs are compared with those of non-S/A TFTs. The comparisons in the n-channel and the p-channel TFTs are shown in Figure 2.5 and Figure 2.6, respectively. In these experiments, it is found that the characteristics of S/A and non-S/A TFTs are similar, and mobility of the n-channel TFTs are around 5 cm2/V-sec while those of the p-channel TFTs are around 3 cm2/V.sec. It should be noted that no degradation can be observed as a result of using the new I/D technique.
2.2.2 New Masking technique and CMOS Process
A non-resist-masking process, however, is required when the CMOS con g-uration is fabricated using the new I/D technique, since the temperature of the substrate reaches about 300oC due to the high accelerating voltage. In order to solve this problem, a new masking technique is also proposed. In this process, n-channel gate electrodes and p-channel gate electrodes are formed separately in a sequential manner.
In the process sequence for the CMOS con guration, An SiO2 bu er layer is deposited on the glass substrate to protect TFTs from contamination from components of the glass. Then, pad poly-Si patterns are formed for source and drain regions, which are made of a 150 nm poly-Si lm. A 25 nm channel poly-Si layer is deposited by low pressure chemical vapor deposition (LPCVD) at 600 oC. Thinner poly-Si lm gives better electrical characteris-tics such as high ON current, low OFF current and low photo-current. After patterning of the channel poly-Si layer, a 150 nm SiO2 gate insulator is deposited by electron cyclotron resonance chemical vapor deposition (ECR-CVD) at 100 oC in a vacuum. Then, a Cr lm is deposited at 180 oC. First, only p-channel gate electrodes are formed. The next step is to form source and drain regions of p-channel TFTs by the new I/D technique. Boron ions are implanted through the gate insulator with a dose of 5 x 1015 cm-2 at energy of 80 keV. N-channel gate electrodes are also formed and phosphorus ions are implanted with a dose of 3x1015 cm-2 at energy of 110 keV by the new I/D technique Impurities are activated by a XeCl excimer laser.
2.3 Device characterization of p/i/n Thin- lm
phototransistors for photosensor applications
Thin-Film photo devices are promising for photo sensor applications, such as ambient light sensors, image Scanners, arti cial retinas etc. Here thin- lm photo devices are integrated with low-temperature poly-Si thin- lm tran-sistors. The p/i/n TFPT is shown in Figure. 2.7. The p/i/n TFPT is fabricated on a glass substrate using the same fabrication processes as TFTs which were discussed earlier. First, an amorphous-Si lm is deposited us-ing low-pressure chemical-vapor deposition of Si2H6 and crystallized using XeCl excimer laser to form a poly-Si lm, whose thickness is 50 nm. Next, a SiO2 lm is deposited using plasma-enhanced chemical-vapor deposition of tetraethylorthosilicate to form a control-insulator lm, whose thickness is 75 nm. A metal lm is deposited and patterned to form a control electrode. Afterward, phosphorous ions are implanted through a photo resist mask at 55 keV with a dose of 2 1015 cm-2 to form an n-type anode region, and boron ions are also implanted through a photo resist mask at 25 keV with a dose of 1.5 1015 cm-2 to form a p-type cathode region. Finally, water-vapor heat treatment is performed at 400 oC for 1 h to thermally activate the dopant ions and simultaneously improve the poly-Si lm, control-insulator lm, and their interfaces.The p/i/n TFPT must be illuminated from the backside of
the glass substrate because the control electrode is usually formed using an opaque metal lm. Therefore, the other LTPS TFTs are also illuminated when the p/i/n TFPT is integrated with them. However, the photo leakage current in the LTPS TFTs can be negligible by appropriately designing them, i.e., the gate width should be wide for the p/i/n TFT, whereas narrow for the LTPS TFTs.
2.3.1 Electrooptical Measurement
The electrooptical measurement is shown in Figure.2.8. The p/i/n TFPT is located on a rubber spacer in a shield chamber and connected via a manual prober to a voltage source and ampere meter. White light from a halogen lamp is formed to be parallel through a convex lens, re ected by a triangu-lar prism and irradiated through the glass substrates to the back surfaces of the p/i/n TFPT. Although the light from a halogen lamp includes the light from 400 to 750 nm with a peak around 600 nm and is therefore reddish despite a built-in infrared filter, the conclusion in this research is generally correct. The electric current between the n- and p-type regions is detected with changing the applied voltage and irradiated luminance.
The electro optical characteristic is shown in Figure.2.9. First, it is found that the dark current, Idetect when Lphoto = 0, is su ciently small except
when Vctrl and Vapply are large.
The reason is because the p/i and i/n junctions steadily endure the reverse bias. This characteristic is useful to improve the S/N ratio of the p/i/n TFPT for photo sensor applications. Next, Idetect increases as Lphoto in-creases. This characteristic is also useful to acquire fundamental detectabil-ity. Finally, Idetect becomes maximal when Vctrl Vapply. This reason is discussed below:
When Vctrl < 0, since Vctrl < in the entire intrinsic region, a hole channel is induced, and a pseudo p/n junction appears near the anode region. Since a depletion layer is narrowly formed there, where carrier generation occurs due to light irradiation, Idetect is small. When Vctrl is approximately equal to 0, although a hole channel is still induced, since Vctrl is approximately equal to near the cathode region, the hole density is low there, which is sim-ilar to the pincho phenomena in the saturation region of MOSFETs. Since another depletion layer is widely formed there, Idetect is large. When 0 < Vctrl < Vapply, since Vctrl > on the side of the cathode region, an electron channel is induced there. At the same time, since Vctrl < on the side of the anode region, a hole channel is still induced there. Since the depletion layer
WIRELESS POWER SUPPLY USING INDUCTIVE COUPLING
3.1 Introduction
Many implanted electrical power to function; be it in the form of an im-planted battery or via wireless power transmission. It is often advantageous to develop methods for wireless power transmission to an implant located deep inside the body as replacement of batteries which requires additional surgery is undesirable. An example of this is a retinal prosthesis. A reti-nal prosthesis can create a sense of vision by electrically stimulating intact neural cells in the visual system of the blind. Such prosthesis will require
continuous power transmission in order to achieve real-time moving images. E cient transmission of power is a performance limiting factor for successful implementation of the prosthesis. We estimate that a high density electrode array with more than 1000 electrodes will consume about 45 mW of power. This includes 25 mW to operate the electronics on the chip and an addi-tional 20 mW for neuronal stimulation with a 3.3 V stimulation threshold. The latter is calculated based on 64 simultaneously operating electrodes each requiring a maximum of 0.3 mW at 60 Hz image refresh rate.
Inductive coupling of magnetic eld is an e cient way for transmitting en-ergy through tissue. This is because electrical energy can be easily converted to magnetic energy and back using conductive coils. Traditionally, a pair of inductive coils; a primary (transmit) and a secondary (receive) coils, are used. The secondary coil can be located within the eye and the primary coil external to the eye. However, several problems will arise if we implement this method. The rst problem is di culty in placing a large receive coil inside the eye. This will require complicated surgical procedure, often a ma-jor challenge in implementing a wireless power solution. The other problems
we face are large separation between the coils and the constant relative mo-tion between the primary and secondary coils. The latter problems result in reduction in power transfer to the device. In order to overcome these prob-lems we propose the use of an intermediate link between the primary and secondary coil as shown in Figure 3.1. In this gure we show the possible locations for one-pair coils and a two pair coils system which consists of an additional intermediate link made out of a pair of serially connected coils. In this method, the secondary coil is located under the sclera (eye wall) and is connected to the implanted device via electrical wires which are embedded under the wall of the eye. By placing these components under the sclera, we avoid having a permanent wire breaching through the eye wall. The trans-mit coil is placed on the skin of the head at an inconspicuous location, for example at the back of the ear. The intermediate coils are positioned with one end on the sclera over the receive coil and the other end under the skin beneath the transmit coil. The advantage of this method is immunity to variation in coupling due to rapid movements of the eye as relative motion between adjacent coils is restricted. It also has the potential to increase the power transfer e ciency compared to a one-pair coil system.
Working
The wireless power supply using inductive coupling is shown in Figure 3.2. The right graph in Figure 3.2. is a measured stability of the supply voltage. This system includes a power transmitter, power receiver, Diode Bridge, and Zener diodes. The power transmitter consists of an ac voltage source and induction coil. The Vpp of the ac voltage source is 10 V, and the frequency is 34 kHz, which is a resonance frequency of this system. The material of the induction coil is an enameled copper wire, the diameter is 1.8 cm, and the winding number is 370 times. The power receiver also consists of an induction coil, which is the same as the power transmitter and located face to face. The diode bridge recti es the ac voltage to the dc voltage, and the Zener diodes regulate the voltage value. The Diode Bridge and Zener diodes are discrete devices and encapsulated in epoxy resin. Although the current system should be downsized and bio-compatibility has to be inspected, the supply system is in principle very simple to implant it into human eyeballs. As a result, the generated power is not so stable as shown in Figure 3.2., which may be because the arti cial retina is fabricated on a insulator sub-strates, has little parasitic capacitance, and is subject to the in uence of noise. Therefore, it is necessary to con rm whether the arti cial retina can be correctly operated even using the unstable power source.
SUMMARY
The arti cial retina using poly-Si TFTs and wireless power supply using inductive coupling are located in a light-shield chamber, and Vout in each retina pixel is probed by a manual prober and voltage meter. White light from a metal halide lamp is diaphragmmed by a pinhole slit, focused through a convex lens, re ected by a triangular prism and irradiated through the glass substrate to the back surfaces of the arti cial retina on a rubber spacer. The real image of the pinhole slit is reproduced on the back surface. Figure. 4.1 shows the detected result of irradiated light. It is con rmed that the Lphoto distribution can be reproduced as the Vout distribution owing to the parame-ter optimization of the wireless power supply system even if it is driven using the unstable power source, although shape distortion is slightly observed, which is due to the misalignment of the optical system or characteristic vari-ation of TFTs.