21-09-2017, 11:04 AM
An intelligent fuzzy logic inference pipeline was designed and built to control a buck-boost DC-DC converter with a semi-custom VLSI chip. The diffuse linguistics describing the switching topologies of the converter was mapped in a query table that was synthesized in a set of Boolean equations. A VLSI chip - a field programmable gate array (FPGA) - was used to implement the Boolean equations. The features include the size of the RAM chip independent of the number of rules in the knowledge base, fuzzification and defuzzification on the chip, faster response with speeds on fuzzy logic inferences per second (FLIPS) and a low cost VLSI chip.