16-05-2012, 12:14 PM
ARM PROCESSOR
ARM.ppt (Size: 1.04 MB / Downloads: 52)
B and BL
Usage
The B instruction causes a branch to label.
The BL instruction copies the address of the next instruction into r14 (lr, the linkregister), and causes a branch to label.
BX
Branch and exchange instruction set
Syntax
BX{cond} Rm
cond is an optional condition code
Rm is an ARM register containing the address to branch
Bit 0 of Rm is not used as part of the address.
If bit 0 of Rm is set, the instruction sets the T flag in the CPSR, and thecode at the destination is interpreted as Thumb code.
If bit 0 of Rm is clear, bit 1 must not be set.
SWITCHING to THUMB
To call thumb routine from arm routine, core has to change state
-by changing T bit in CPSR
-using BX and BLX instruction
BX R0
BLX R0
Enters thumb state if bit 0 of Rm is set to binary 1 otherwise it enters arm state.
ARM.ppt (Size: 1.04 MB / Downloads: 52)
B and BL
Usage
The B instruction causes a branch to label.
The BL instruction copies the address of the next instruction into r14 (lr, the linkregister), and causes a branch to label.
BX
Branch and exchange instruction set
Syntax
BX{cond} Rm
cond is an optional condition code
Rm is an ARM register containing the address to branch
Bit 0 of Rm is not used as part of the address.
If bit 0 of Rm is set, the instruction sets the T flag in the CPSR, and thecode at the destination is interpreted as Thumb code.
If bit 0 of Rm is clear, bit 1 must not be set.
SWITCHING to THUMB
To call thumb routine from arm routine, core has to change state
-by changing T bit in CPSR
-using BX and BLX instruction
BX R0
BLX R0
Enters thumb state if bit 0 of Rm is set to binary 1 otherwise it enters arm state.