22-05-2012, 04:00 PM
Direct Memory Access
dma pddf.pdf (Size: 153.22 KB / Downloads: 128)
Definitions
In the discussion on computer architecture and the role of the Central Processing Unit a brief description was given
on how the CPU may transfer data to or from a number of external (other than memory) devices. The operation
treated the I/O system for reading and writing in the same manner as memory, using address, data lines and WR
RD control lines. This requires CPU intervention and is costly in "time".
Direct Memory Access--the ability of an I/O subsystem to transfer data to and from a memory subsystem without
processor intervention.
DMA Controller--a device that can control data transfers between an I/O subsystem and a memory subsystem in the
same manner that a processor can control such transfers.
DMA Controller
The DMA controller can issue commands to the memory that behave exactly like the commands issued by the
CPU. The DMA controller in a sense is a second processor in the system but is dedicated to an I/O function. The
DMA controller as shown below connects one or more I/O ports directly to memory, where the I/O data stream
passes through the DMA controller faster and more efficiently than through the processor as the DMA channel is
specialised to the data transfer task.
The DMA interface
The DMA adds one more level of complexity to the I/O interface because a DMA controller has independent
access to memory. One set of wires (bus) can carry at most one transaction at a time. If the DMA and a
microprocessor share the signal wire to memory there must be a mechanism to arbitrate which shall have access to
memory when both attempt to at the same time.
Functional behaviour of a DMA transaction
1. The processor transmits the following information to a DMA controller:
(a) beginning address in memory
(b) block length (number of words to transfer)
© direction (memory-to-device or device-to-memory)
(d) port ID
(e) end of block action (interrupt request or no interrupt request).
dma pddf.pdf (Size: 153.22 KB / Downloads: 128)
Definitions
In the discussion on computer architecture and the role of the Central Processing Unit a brief description was given
on how the CPU may transfer data to or from a number of external (other than memory) devices. The operation
treated the I/O system for reading and writing in the same manner as memory, using address, data lines and WR
RD control lines. This requires CPU intervention and is costly in "time".
Direct Memory Access--the ability of an I/O subsystem to transfer data to and from a memory subsystem without
processor intervention.
DMA Controller--a device that can control data transfers between an I/O subsystem and a memory subsystem in the
same manner that a processor can control such transfers.
DMA Controller
The DMA controller can issue commands to the memory that behave exactly like the commands issued by the
CPU. The DMA controller in a sense is a second processor in the system but is dedicated to an I/O function. The
DMA controller as shown below connects one or more I/O ports directly to memory, where the I/O data stream
passes through the DMA controller faster and more efficiently than through the processor as the DMA channel is
specialised to the data transfer task.
The DMA interface
The DMA adds one more level of complexity to the I/O interface because a DMA controller has independent
access to memory. One set of wires (bus) can carry at most one transaction at a time. If the DMA and a
microprocessor share the signal wire to memory there must be a mechanism to arbitrate which shall have access to
memory when both attempt to at the same time.
Functional behaviour of a DMA transaction
1. The processor transmits the following information to a DMA controller:
(a) beginning address in memory
(b) block length (number of words to transfer)
© direction (memory-to-device or device-to-memory)
(d) port ID
(e) end of block action (interrupt request or no interrupt request).