29-05-2012, 10:46 AM
MEMS Fabrication
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1. Introduction of MEMS Fabrication
MEMS fabrication is an extremely exciting endeavor due to the
customized nature of process technologies and the diversity of
processing capabilities. MEMS fabrication uses many of the same
techniques that are used in the integrated circuit domain such as
oxidation, diffusion, ion implantation, LPCVD, sputtering, etc., and
combines these capabilities with highly specialized micromachining
processes. Some of the most widely
(1.1 & 1.2) are discussed below.
The Chip Fabrication Processes
Figure 1.2
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xidation, MEMS Process Flow
Figure 1.1 MEMS process flow
flow as:
Chip Fabrication Processes
Figurers
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2. Materials
2.1Introduction
The understanding of MEMS requires a mature knowledge of the
materials used to construct the devices, as the material properties of each
component can influence device performance. Because the fabrication of
MEMS structures often depends on the use of structural, sacrificial, and
masking materials on a common substrate, issues related to etch selectivity,
adhesion, microstructure, and a host of other properties are important design
considerations.
2.2 Single-Crystal Silicon
In MEMS fabrications, single-crystal Si serves several key functions.
Single-crystal Si is the most versatile material for bulk micromachining,
owing to the availability of well-characterized anisotropic etches and etchmask
materials. For surface micromachining applications, single-crystal Si
substrates are used as mechanical platforms on which device structures are
fabricated, whether they are made from Si or other materials. In the case of
Si-based integrated MEMS devices, single-crystal Si is the primary
electronic material from which the IC devices are fabricated.
Bulk micromachining of Si uses wet and dry etching techniques in
conjunction with etch masks and etch stops to sculpt micromechanical
devices from the Si substrate.
One of the most important characteristics of etching is the directionality (or
profile) of the etching process. If the etch rate in all directions is equal, the
process is said to be isotropic. By comparison, etch processes that are
anisotropic generally have etch rates perpendicular to the wafer surface that
are much larger than the lateral etch rates. It should be noted that an
anisotropic sidewall profile could also be produced in virtually any Si
substrate by deep reactive ion etching, ion beam milling, or laser drilling.
A large number of dry etch processes are available to pattern single-crystal
Si. The process spectrum ranges from physical etching via sputtering and ion
milling to chemical plasma etching. Two processes, reactive ion etching
(RIE) and reactive ion beam etching (RIBE), combine aspects of both
physical and chemical etching. In general, dry etch Processes utilize a
plasma of ionized gases along with neutral particles to remove material from
the etch surface.
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2.2Polysilicon
For the fabrication of surface micromachined MEMS devices utilizes
polycrystalline Si (polysilicon) as the primary structural material, SiO2 as
the sacrificial Materials for Microelectromechanical Systems material,
and Si3N4 for electrical isolation of device structures. Heavy reliance on
this material system stems in part from the fact these three materials find
uses in the fabrication of ICs, and as a result, film deposition and etching
technologies are readily and widely available. Like single-crystal Si,
polysilicon can be doped during or after film deposition using standard
IC processing techniques.
For MEMS and IC applications, polysilicon thin films are commonly
deposited by a process known as low-pressure chemical vapor deposition
(LPCVD).
The typical polysilicon LPCVD reactor (or furnace) is based on a hotwall
resistance-heated horizontal fused-silica tube design. The
temperature of the wafers in the furnace is maintained by heating the tube
using resistive heating elements. The furnaces are equipped with quartz
boats that have closely spaced vertically oriented slots that hold the
wafers. The close spacing requires that the deposition process be
performed in the reaction-limited regime to obtain uniform deposition
across each wafer surface. In the reaction-limited deposition regime, the
deposition rate is determined by the reaction rate of the reacting species
on the substrate surface, as opposed to the arrival rate of the reacting
species to the surface (which is the diffusion-controlled regime). The
relationship between the deposition rate and the substrate temperature in
the reaction-limited regime is exponential; therefore, precise temperature
control of the reaction chamber is required. Operating in the reactionlimited
regime facilitates conformal deposition of the film over the
substrate topography, an important aspect of multilayer surface
micromachining.
Minimizing the maximum required temperature and duration of hightemperature
processing steps is important for the fabrication of
micromechanical components on wafers that contain temperature
sensitive layers.
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2.3Silicon Dioxide
SiO2 can be grown thermally on Si substrates as well as deposited using a
variety of processes to satisfy a wide range of different requirements. In
polysilicon surface micromachining, SiO2 is used as a sacrificial material,
as it can be dissolved easily using etchants that do not attack polysilicon.
In a less prominent role, SiO2 is used as an etch mask for dry etching of
thick polysilicon films because it is chemically resistant to dry
polysilicon etch chemistries.
The SiO2 growth and deposition processes most widely used in
polysilicon surface micromachining are thermal oxidation and LPCVD.
Thermal oxidation of Si is performed at high temperatures (e.g., 900 to
1000°C) in the presence of oxygen or steam. Because thermal oxidation
is a self-limiting process (i.e., the oxide growth rate decreases with
increasing film thickness), the maximum practical film thickness that can
be obtained is about 2 μm, which for many sacrificial applications is
sufficient. SiO2 films for MEMS applications can also be deposited using
an LPCVD process known as lowtemperature oxidation (LTO). In
general, LPCVD provides a means for depositing thick (2 μm) SiO2 films
at temperatures much lower than thermal oxidation.
Two other materials in the SiO2 family are receiving increasing
attention from MEMS fabricators, especially now that the material
systems have expanded beyond conventional Si processing. The first of
these is crystalline quartz. The chemical composition of quartz is SiO2.
Quartz is optically transparent and, like its amorphous counterpart, quartz
is electrically insulating. However, the crystalline nature of quartz gives
it piezoelectric properties that have been exploited for many years in
electronic circuitry. Like singlecrystal Si, quartz substrates are available
as high-quality large-area wafers. Also like single-crystal Si, quartz can
be bulk micromachined using anisotropic etchants based on heated HF
and ammonium fluoride (NH4F) solutions, albeit the structural shapes
that can be etched into quartz do not resemble the shapes that can be
etched into Si.
A second SiO2-related material that has found utility in MEMS is spinon-
glass (SOG), which is used in thin-film form as a planarization
dielectric material in IC processing. As the name implies, SOG is applied
to a substrate by spin coating. The material is polymer based with a
viscosity suitable for spincoating, and once dispensed at room
temperature on the spinning substrate, it is cured at elevated temperatures
to form a solid thin film.
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The process required the use of molds to create the structures.
Electroplated nickel (Ni) was used as the molding material, with Ni
channel plate molds fabricated using a conventional Lithographie,
Galvanoformung, Abformung (LIGA) process. The Ni molds were filled
with SOG, and the sacrificial Ni molds were removed in a reverse
electroplating process. In this case, the fabricated SOG structures were
over 100 μm tall, essentially bulk micromachined structures fabricated
using a sacrificial molding material system.
2.4Silicon Nitride
Si3N4 is widely used in MEMS for electrical isolation, surface
passivation, and etch masking and as a mechanical material. Two
deposition methods are commonly used to deposit Si3N4 thin films:
LPCVD and PECVD. PECVD Si3N4 is generally nonstoichiometric and
may contain significant concentrations of hydrogen. Use of PECVD
Si3N4 in micromachining applications is somewhat limited because its
etch rate in HF can be high (e.g., often higher than that of thermally
grown SiO2) due to the porosity of the film.
However, PECVD offers the potential to deposit nearly stress-free
Si3N4 films, an attractive property for many MEMS applications,
especially in the area of encapsulation and packaging. Unlike its PECVD
counterpart, LPCVD Si3N4 is extremely resistant to chemical attack,
thereby making it the material of choice for many Si bulk and surface
micromachining applications. LPCVD Si3N4 is commonly used as an
insulating layer to isolate device structures from the substrate and from
other device structures because it is a good insulator with a resistivity of
1016-cm and a field breakdown limit of 107 V/cm.
The essential interactions among substrate, electrical isolation layer,
sacrificial layers, and structural layers are best illustrated by examining
the critical steps in a multilevel surface micromachining process.The
example used here (shown in Figure 2.1) is the fabrication of a Si
micromotor using a technique called the rapid prototyping process. The
rapid prototyping process utilizes three deposition and three
photolithography steps to implement flange-bearing side-drive
micromotors such as in the SEM of Figure 2.2.
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FIGURE 2.1 Cross-sectional schematics of the rapid prototyping process used to
fabricate polysilicon micromotors by surface micromachining: (a) after the rotor–stator
etch, (b) after the flange mold etch, © after the bearing clearance oxidation step, (d) after
the bearing etch, and (e) after the release step.
FIGURE 2.2 SEM micrograph of a polysilicon micromotor fabricated using the rapid
prototyping process.
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2.5Germanium-Based Materials
Development of Ge for microelectronic devices might have continued
if only a water-insoluble oxide could be formed on Ge surfaces.
Nonetheless, there is a renewed interest in Ge for micromachined devices,
especially for devices that require use of low-temperature processes.
In many respects, fabrication of devices made from poly-SiGe thin films
follows processing methods used in polysilicon micromachining as Si
and Ge are quite compatible. The poly-SiGe/poly-Ge material system is
particularly attractive for surface micromachining, as it is possible to use
H2O2 as a release agent.
Capitalizing on the low substrate temperatures associated with the
deposition of poly-SiGe and poly-Ge thin films, an integrated MEMS
fabrication process on Si wafers has been demonstrated. In this process,
CMOS structures are first fabricated into standard Si wafers.
Poly-SiGe thin-film mechanical structures are surface micromachined
atop the CMOS devices using a poly-Ge sacrificial layer and H2O2 as an
etchant. A significant advantage of this design lies in the fact that the
MEMS structure is positioned directly above the CMOS structure, thus
significantly reducing the parasitic capacitance and contact resistance
characteristic of interconnects associated with the side-by-side integration
schemes often used in integrated polysilicon MEMS. Use of H2O2 as the
sacrificial etchant means that no special protective layers are required to
protect the underlying CMOS layer during release. Clearly, the unique
properties of the poly-SiGe/poly-Ge material system, used in conjunction
with the Si/SiO2 material system, enable fabrication of integrated MEMS
that minimizes interconnect distances and potentially increases device
performance.
2.6Metals
Metals are used in many different capacities ranging from hard etch
masks and thin film conducting interconnects to structural elements in
microsensors and microactuators.
Aluminum (Al) is probably the most widely used metal in
microfabricated devices. In MEMS, Al thin films can be used in
conjunction with polymers such as polyimide because the films can be
sputterdeposited at low temperatures.
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2.7Silicon Carbide
A direct replacement for Si in such applications, the material would
have to be a chemically inert, extremely hard, temperature-insensitive,
micromachinable semiconductor. These requirements pose significant
fabrication challenges, as micromachining requires the use of chemical
and mechanical processes to remove unwanted material. In general, a
class of wide bandgap semiconductors that includes silicon carbide (SiC)
and diamond embodies the electrical, mechanical, and chemical
properties required for many harsh environment applications, but until
recently these materials found little usefulness in MEMS because the
necessary micromachining processes did not exist. The following two
sections review the development of SiC and diamond for MEMS
applications.
SiC is not etched in any wet chemistries commonly used in Si
micromachining. SiC can be etched in strong bases like KOH, but only at
temperatures in excess of 600°C. SiC does not melt but rather sublimes at
temperatures in excess of 1800°C. Single-crystal 4H- and 6H-SiC wafers
are commercially available, although they are smaller (3 in diameter) and
much more expensive than Si.With this list of properties, it is little
wonder why SiC is being actively researched for MEMS applications.
SiC thin films can be grown or deposited using a number of different
techniques. For high-quality singlecrystal films, APCVD and LPCVD
processes are most commonly employed.
Polycrystalline SiC, hereafter referred to as poly-SiC, has proven to be a
very versatile material for SiC MEMS. Unlike single-crystal versions of
SiC, poly-SiC can be deposited on a variety of substrate types, including
common surface micromachining materials such as polysilicon, SiO2 and
Si3N4. Moreover, poly-SiC can be deposited using a much wider set of
processes than epitaxial films; LPCVD, APCVD, PECVD, and reactive
sputtering have all been used to deposit poly-SiC films. The deposition of
poly-SiC
2.8Diamond
Diamond is a leading material for MEMS applications in harsh
environments. It is commonly known as nature’s hardest material, an
ideal property for high-wear environments. Diamond has a very large
electronic bandgap (5.5 eV) that is well suited for stable hightemperature
operation. Diamond is a high-quality insulator with a
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dielectric constant of 5.5; however, it can be doped with B to create ptype
conductivity. In general, diamond surfaces are chemically inert in
the same environments as SiC.
Bulk micromachining of diamond is more difficult than SiC because
electrochemical etching techniques have not been demonstrated.Using a
strategy similar to that used in SiC, bulk micromachined diamond
structures have been fabricated using bulk micromachined Si molds . The
Si molds were fabricated using conventional micromachining techniques
and filed with polycrystalline diamond deposited by HFCVD. The
HFCVD process uses hydrogen as a carrier gas and methane as the
carbon source.
Surface micromachining of polycrystalline diamond thin films requires
modifications of conventional micromachining practices to compensate
for the nucleation and growth mechanisms of diamond thin films on
sacrificial substrates. Early work in this area focused on developing thinfilm
patterning techniques.
Conventional RIE methods are generally ineffective, so effort was
focused on developing selective growth methods. One early method used
selective seeding to form patterned templates for diamond nucleation.
The selective seeding process was based on the lithographic patterning of
photoresist mixed with diamond powders . The diamond-loaded
photoresist was deposited onto a Cr-coated Si wafer, exposed and then
developed, leaving a patterned structure on the wafer surface.
During the diamond deposition process, the photoresist rapidly
evaporates, leaving behind the diamond seed particles in the desired
structural shapes, which then serve as a template for diamond growth.
2.9 III–V Materials
Galium arsenide (GaAs), indium phosphide (InP), and other III–V
compounds are attractive electronic materials for various types of sensors
and optoelectronic devices. In general, III–V compounds have favorable
piezoelectric and optoelectric properties, high piezoresistive constants,
and wide electronic bandgaps (relative to Si). In addition, III–V materials
can be deposited as ternary and quaternary alloys that have lattice
constants closely matched to the binary compounds from which they are
derived (e.g.,
AlxGa1–x As and GaAs), thus permitting the fabrication of a wide
variety of heterostructures that facilitate device performance. Although
the III–V class of materials is quite large.
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3. The MEMS Processes Cycle
MEMS technology is based on a number of tools and methodologies,
which are used to form small structures with dimensions in the
micrometer scale (one millionth of a meter). Significant parts of the
technology have been adopted from integrated circuit (IC) technology.
For instance, almost all devices are built on wafers of silicon, like ICs.
The structures are realized in thin films of materials, like ICs. They are
patterned using photolithographic methods, like ICs. There are however
several processes that are not derived from IC technology, and as the
technology continues to grow the gap with IC technology also grows.
There are three basic building blocks in MEMS technology, which are
the ability to deposit thin films of material on a substrate, to apply a
patterned mask on top of the films by photolithographic imaging, and to
etch the films selectively to the mask. A MEMS process is usually a
structured sequence of these operations to form actual devices as shown
in Figure 3.
Figure 3 M1E3M S process in sequence
operations
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A simplified sequence of front-end processes for fabricating typical
chips involves:
(1) Forming an ingot by pulling molten silicon;
(2) Slicing the silicon ingot into wafers of uniform thickness with a wire
saw;
(3) Lapping and polishing the silicon wafer to a mirror-like finish;
(4) Cleaning the wafer;
(5)Forming a thin film layer of silicon dioxide on the wafer in a diffusion
furnace where oxygen, hydrogen or a combination of the two is introduced
to cause a chemical reaction (oxidation) with the silicon wafer’s surface;
(6) Diffusing impurities (doping) in order to change the wafer’s electrical
properties.
(7) depositing insulating or conducting layers on the wafer surface, which
sometimes is accomplished in a diffusion furnace via a chemical reaction
called chemical vapor deposition;
(8) Coating and baking a photosensitive material, called photoresist, on the
wafer;
(9) Creating circuit patterns by exposing the wafer to light directed through a
mask with circuit patterns;
(10) Removing the soluble portion of the photoresist by placing the wafer in
a chemical solution, leaving only the desired pattern;
(11) Etching away the exposed areas to create a dimensional pattern on the
wafer surface;
(12) Creating electrically charged conductive regions by driving ions into
the exposed areas of the patterned wafer; and
(13) Annealing the wafer through a high temperature process to relieve
stress and drive the implanted ions deeper into the wafer.
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3.1Deposition process
One of the basic building blocks in MEMS processing is :
A conformal coating covers all surfaces to a uniform depth
A planarizing coating tends to reduce the vertical step height of the
cross-section
A non-conformal coating deposits more on top surfaces than bottom
and/or side surfaces
MEMS deposition technology can be classified in two groups:
1. Depositions that happen because of a chemical reaction:
o Chemical Vapor Deposition (CVD)
o Electrodeposition
o Epitaxy
o Thermal oxidation
These processes exploit the creation of solid materials directly from
chemical reactions in gas and/or liquid compositions or with the
substrate material. The solid material is usually not the only product
formed by the reaction. Byproducts can include gases, liquids and
even other solids.
2. Depositions that happen because of a physical reaction:
o Physical Vapor Deposition (PVD)
o Casting
Common for all these processes are that the material deposited is
physically moved on to the substrate. In other words, there is no
chemical reaction which forms the material on the substrate. This is
not completely correct for casting processes, though it is more
convenient to think of them that way.
This is by no means an exhaustive list since technologies evolve
continuously.
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Chemical Vapor Deposition (CVD)
In this process, the substrate is placed inside a reactor to which a number
of gases are supplied. The fundamental principle of the process is that a
chemical reaction takes place between the source gases. The product of that
reaction is a solid material with condenses on all surfaces inside the reactor.
The two most important CVD technologies in MEMS are the Low Pressure
CVD (LPCVD) and Plasma Enhanced CVD (PECVD). The LPCVD process
produces layers with excellent uniformity of thickness and material
characteristics. The main problems with the process are the high deposition
temperature (higher than 600°C) and the relatively slow deposition rate. The
PECVD process can operate at lower temperatures (down to 300° C) thanks
to the extra energy supplied to the gas molecules by the plasma in the reactor.
However, the qualities of the films tend to be inferior to processes running at
higher temperatures. Secondly, most PECVD deposition systems can only
deposit the material on one side of the wafers on 1 to 4 wafers at a time.
LPCVD systems deposit films on both sides of at least 25 wafers at a time.
A schematic diagram of a typical LPCVD reactor is shown in the Figure 3.1
below.
Figure 3.1: Typical hot-wall LPCVD reactor.
CVD processes are ideal to use when you want a thin film with good
step coverage. A variety of materials can be deposited with this technology;
however, some of them are less popular with fabs because of hazardous
byproducts formed during processing. The quality of the material varies
from process to process, however a good rule of thumb is that higher process
temperature yields a material with higher quality and less defects.
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Electrodeposition
This process is also known as "electroplating" and is typically
restricted to electrically conductive materials. There are basically two
technologies for plating: Electroplating and Electroless plating. In the
electroplating process the substrate is placed in a liquid solution (electrolyte).
When an electrical potential is applied between a conducting area on the
substrate and a counter electrode (usually platinum) in the liquid, a chemical
redox process takes place resulting in the formation of a layer of material on
the substrate and usually some gas generation at the counter electrode.
In the electroless plating process a more complex chemical solution is
used, in which deposition happens spontaneously on any surface which
forms a sufficiently high electrochemical potential with the solution. This
process is desirable since it does not require any external electrical potential
and contact to the substrate during processing. Unfortunately, it is also more
difficult to control with regards to film thickness and uniformity. A
schematic diagram of a typical setup for electroplating is shown in next
Figure 3.2.
When do I want to use electrodeposition?
The electrodeposition process is well suited to make films of metals
such as copper, gold and nickel. The films can be made in any thickness
from ~1μm to >100μm. The deposition is best controlled when used with an
external electrical potential, however, it requires electrical contact to the
substrate when immersed in the liquid bath. In any process, the surface of
the substrate must have an electrically conducting coating before the
deposition can be done.
Figure 3.2 Typical setup for electrodeposition.
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Epitaxy
This technology is quite similar to what happens in CVD processes,
however, if the substrate is an ordered semiconductor crystal (i.e. silicon,
gallium arsenide), it is possible with this process to continue building on the
substrate with the same crystallographic orientation with the substrate acting
as a seed for the deposition. If an amorphous/polycrystalline substrate
surface is used, the film will also be amorphous or polycrystalline.
There are several technologies for creating the conditions inside a reactor
needed to support epitaxial growth, of which the most important is Vapor
Phase Epitaxy (VPE). In this process, a number of gases are introduced in an
induction heated reactor where only the substrate is heated. The temperature
of the substrate typically must be at least 50% of the melting point of the
material to be deposited.
An advantage of epitaxy is the high growth rate of material, which allows
the formation of films with considerable thickness (>100μm). Epitaxy is a
widely used technology for producing silicon on insulator (SOI) substrates.
The technology is primarily used for deposition of silicon. A schematic
diagram of a typical vapor phase epitaxial reactor is shown in the Figure 3.3.