14-11-2012, 02:49 PM
Low Cost Signal Conditioning 8-Bit ADC
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GENERAL DESCRIPTION
The AD670 is a complete 8-bit signal conditioning analogto-
digital converter. It consists of an instrumentation amplifier
front end along with a DAC, comparator, successive approximation
register (SAR), precision voltage reference, and a threestate
output buffer on a single monolithic chip. No external
components or user trims are required to interface, with full
accuracy, an analog system to an 8-bit data bus. The AD670
will operate on the +5 V system supply. The input stage provides
differential inputs with excellent common-mode rejection
and allows direct interface to a variety of transducers.
The device is configured with input scaling resistors to permit
two input ranges: 0 mV to 255 mV (1 mV/LSB) and 0 to 2.55 V
(10 mV/LSB). The AD670 can be configured for both unipolar
and bipolar inputs over these ranges. The differential inputs and
common-mode rejection of this front end are useful in applications
such as conversion of transducer signals superimposed on
common-mode voltages.
The AD670 incorporates advanced circuit design and proven
processing technology. The successive approximation function
is implemented with I2L (integrated injection logic). Thin-film
SiCr resistors provide the stability required to prevent missing
codes over the entire operating temperature range while laser
wafer trimming of the resistor ladder permits calibration of the
device to within ±1 LSB. Thus, no user trims for gain or offset
are required. Conversion time of the device is 10 ms.
The AD670 is available in four package types and five grades.
The J and K grades are specified over 0°C to +70°C and come
in 20-pin plastic DIP packages or 20-terminal PLCC packages.
The A and B grades (–40°C to +85°C) and the S grade (–55°C
to +125°C) come in 20-pin ceramic DIP packages.
CIRCUIT OPERATION/FUNCTIONAL DESCRIPTION
The AD670 is a functionally complete 8-bit signal conditioning
A/D converter with microprocessor compatibility. The input
section uses an instrumentation amplifier to accomplish the
voltage to current conversion. This front end provides a high
impedance, low bias current differential amplifier. The common-
mode range allows the user to directly interface the device
to a variety of transducers.
The AID conversions are controlled by R/W, CS, and CE. The
R/W line directs the converter to read or start a conversion. A
minimum write/start pulse of 300 ns is required on either CE or
CS. The STATUS line goes high, indicating that a conversion is
in process. The conversion thus begun, the internal 8-bit DAC
is sequenced from MSB to LSB using a novel successive approximation
technique. In conventional designs, the DAC is
stepped through the bits by a clock. This can be thought of as a
static design since the speed at which the DAC is sequenced is
determined solely by the clock. No clock is used in the AD670.
Instead, a “dynamic SAR” is created consisting of a string of inverters
with taps along the delay line. Sections of the delay line
between taps act as one shots. The pulses are used to set and reset
the DAC’s bits and strobe the comparator. When strobed,
the comparator then determines whether the addition of each
successively weighted bit current causes the DAC current sum
to be greater or less than the input current. If the sum is less,
the bit is turned off.
INPUT CONNECTIONS
Standard connections are shown in the figures that follow. An
input range of 0 V to 2.55 V may be configured as shown in Figure
2a. This will provide a one LSB change for each 10 mV of
input change. The input range of 0 mV to 255 mV is configured
as shown in Figure 2b. In this case, each LSB represents 1 mV
of input change. When unipolar input signals are used, Pin 11,
BPO/UPO, should be grounded. Pin 11 selects the input format
for either unipolar or bipolar signals. Figures 3a and 3b show
the input connections for bipolar signals. Pin 11 should be tied
to +VCC for bipolar inputs.
Although the instrumentation amplifier has a differential input,
there must be a return path to ground for the bias currents. If it
is not provided, these currents will charge stray capacitances
and cause internal circuit nodes to drift uncontrollably causing
the digital output to change. Such a return path is provided in
Figures 2a and 3a (larger input ranges) since the 1k resistor leg
is tied to ground. This is not the case for Figures 2b and 3b (the
lower input ranges). When connecting the AD670 inputs to
floating sources, such as transformers and ac-coupled sources,
there must still be a dc path from each input to common. This
can be accomplished by connecting a 10 kW resistor from each
input to ground.