12-09-2017, 10:35 AM
During the desktop PC design era, VLSI design efforts have focused primarily on optimizing the speed to perform real-time intensive computational functions such as video compression, games, graphics, and so on. As a result, we have semiconductor integrated circuits that have integrated several complex signal processing modules and graphic processing units to meet our computing and entertainment needs. While these solutions have addressed the problem in real time, they have not addressed the growing demand for portable operation, where the mobile phone needs for all this without consuming much energy. The strict limitation on power dissipation in portable electronic applications such as smartphones and tablet computers must be met by the VLSI chip designer while still meeting the computing requirements. While wireless devices are rapidly making their way to the consumer electronics market, a key design limitation for portable operation, ie the total power consumption of the device needs to be addressed. Reducing the total energy consumption in such systems is important as it is desirable to maximize uptime with minimum requirements on the size, battery life and weight assigned to the batteries. So the most important factor for consider when designing SoC for portable devices is "low power design".