12-10-2010, 12:52 PM
LOW POWER VLSI TECHNOLOGY.doc (Size: 94 KB / Downloads: 396)
LOW POWER VLSI TECHNOLOGY
ABSTRACT
In the past, the major concerns of the VLSI design were area, performance, cost and reliability; power consideration was mostly of only secondary importance. In recent years, this has begun to change increasingly, power is being given comparable weight to area and speed considerations. High power systems often run hot; high temperature tends to exacerbate several silicon failure mechanisms. Every 10C increase in operating temperature roughly doubles a component’s failure rate.
The growth of personal computing devices (portable desktops, audio and video-based multimedia products) and wireless communications systems demand high-speed computation and complex functionality; with low power consumption. In this context, peak power (maximum possible power dissipation) is a critical design factor as it determines the thermal, electrical limits of designs; impacts the system cost, size and weight; dictates specific battery type, system packaging, heat sinks; aggravates the resistive and inductive voltage drop problems pointing to an ultimate solution- LOW POWER VLSI TECHNOLOGY.
Low power has emerged as a principal theme in today’s electronics industry. The need for low power has caused a major paradigm shift where power dissipation has become as important a consideration as performance and area. This article reviews various strategies and methodologies for designing low power circuits and systems. It describes the many issues facing designers at architectural, logic, circuit and device levels and presents some of the techniques that have been proposed to overcome these difficulties. The article concludes with the future challenges that must be met to design low power, high performance systems.