24-04-2012, 03:51 PM
Bridgeless High-Power-Factor Buck Converter
IEEE YJ 2011.pdf (Size: 949.21 KB / Downloads: 161)
INTRODUCTION
DRIVENby economic reasons and environmental concerns,
maintaining high efficiency across the entire load and
input-voltage range of today’s power supplies is in the forefront
of performance requirements. Specifically, meeting and
exceeding U.S. Environmental Protection Agency’s (EPA) Energy
Star [1], and Climate Saver Computing Initiative (CSCI) [2]
efficiency specifications have become a standard requirement for
both multiple- and single-output offline power supplies. Generally,
the EPA and CSCI specifications define minimum efficiencies
at 100%, 50%, and 20% of full load with a peak efficiency
at 50% load. For example, for the highest performance tier of
single-output power supplies with a 12-V output, i.e., for the
Platinum level power supplies, the required minimum efficiencies
at 100%, 50%, and 20% load, measured at 230 V line, are
92%, 94%, and 91%, respectively.
BRIDGELESS BUCK PFC RECTIFIER WITH VOLTAGE
DOUBLER OUTPUT
The proposed PFC rectifier, as shown in Fig. 1, employs
two back-to-back connected buck converters that operate in alternative
halves of the line-voltage cycle. The buck converter
illustrated in Fig. 2 only operates during positive half-cycles
of line voltage Vac and consists of a unidirectional switch implemented
by diode D1 in series with switch S1 , freewheeling
diode D3 , filter inductor L1 , and output capacitor C1. During
its operation, the voltage across capacitor C1 , which must be selected
lower than the peak of line voltage, is regulated by pulse
widthmodulation (PWM) of switch S1 . Similarly, the buck converter
consisting of the unidirectional switch implemented by
diode D2 in series with switch S2 , freewheeling diode D4 , filter
inductor L2 , and output capacitor C2 operates only during negative
half-cycles of line voltage Vac , as shown in Fig. 3. During
its operation, the voltage across capacitor C2 is regulated by the
PWM of switch S2 .
EXPERIMENTAL RESULTS
The performance of the proposed rectifier in–Fig. 1 was evaluated
on a 65-kHz, 700-W prototype circuit that was designed
to operate from a universal ac-line input (85–264VRMS) with
a 160 V output. Fig. 6 shows the schematic diagram and component
details of the experimental prototype circuit. Since the
drain voltage of switches S1 and S2 are clamped to the voltage
difference between the input voltage and output capacitor voltage,
the peak voltage stress on switch S1 and S2 can be as high
as 380 V, which is the peak input voltage at the maximum line.
The peak current stress on switch S, which occurs at full load
and low line, is approximately 9 A. Therefore, a STP42N65M5
MOSFET (VDSS = 650V, RDS = 0.079Ω) was used for each
buck switch. Since buck diodes D3 and D4 must block both
the same peak voltage stress and conduct the same peak current
as the switches, an RHRP1560 diode (VRRM = 600V,
IFAVM = 15A) was used.
SUMMARY
In this paper, a bridgeless buck PFC rectifier that substantially
improves the efficiency at low line has been introduced.
The proposed rectifier doubles the rectifier output voltage, which
extends useable energy after a dropout of the line voltage. Moreover,
by eliminating input bridge diodes, efficiency is further
improved.