14-06-2012, 05:58 PM
DRIVER SLEEP DETECTION SYSTEM
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MC P89V51RD2:
The P89V51RD2 is 80C51 microcontrollers with 64kB Flash and1024 bytes of data RAM.
A key feature of the P89V51RD2 is its X2 mode option. The design engineer can choose to run the application with the conventional 80C51 clock rate (12 clocks per machine cycle) or select the X2 mode (6 clocks per machine cycle) to achieve twice the throughput at the same clock frequency. Another way to benefit from this feature is to keep the same performance by reducing the clock frequency by half, thus dramatically reducing the EMI.
The Flash program memory supports both parallel programming and in serial In-System Programming (ISP).Parallel programming mode offers gang-programming at high speed, reducing programming costs and time to market. ISP allows a device to be reprogrammed in the end product under software control. The capability to field/update the application firmware makes a wide range of applications possible.
The P89V51RD2 is also In-Application Programmable (IAP), allowing the Flash program memory to be reconfigured even while the application is running.
Functional Description:
Power-On reset code execution
Following reset, the P89V51RD2 will either enter the Soft ICE mode (if previously enabled via ISP command) or attempt to auto baud to the ISP boot loader. If this auto baud is not successful within about 400 ms, the device will begin execution of the user code.
In-System Programming (ISP)
In-System Programming is performed without removing the microcontroller from the system. The In-System Programming facility consists of a series of internal hardware resources coupled with internal firmware to facilitate remote programming of theP89V51RD2 through the serial port. This firmware is provided by Philips and embedded within each P89V51RD2 device. The Philips In-System Programming facility has made in-circuit programming in an embedded application possible with a minimum of additional expense in components and circuit board area. The ISP function uses five pins (VDD, VSS, TxD, RxD, and RST). Only a small connector needs to be available to interface your application to an external circuit in order to use this feature.
Power-on Reset:
At initial power up, the port pins will be in a random state until the oscillator has started and the internal reset algorithm has weakly pulled all pins HIGH. Powering up the device without a valid reset could cause the MCU to start executing instructions from an indeterminate location. Such undefined states may inadvertently corrupt the code in the flash.When power is applied to the device, the RST pin must be held HIGH long enough for the oscillator to start up (usually several milliseconds for a low frequency crystal), in addition to two machine cycles for a valid power-on reset. An example of a method to extend the RST signal is to implement a RC circuit by connecting the RST pin to VDD through a 10 mF capacitor and to VSS through an 8.2 kW resistor as shown in Figure 26. Note that if an RC circuit is being used, provisions should be made to ensure the VDD rise time does not exceed 1 millisecond and the oscillator start-up time does not exceed 10 milliseconds.