21-05-2012, 04:19 PM
Design And Application Guide For High Speed MOSFET Gate Drive Circuits
Design And Application Guide.pdf (Size: 345.26 KB / Downloads: 15)
ABSTRACT
The main purpose of this paper is to demonstrate a systematic approach to design high performance
gate drive circuits for high speed switching applications. It is an informative collection of topics offering
a “one-stop-shopping” to solve the most common design challenges. Thus it should be of interest to
power electronics engineers at all levels of experience.
The most popular circuit solutions and their performance are analyzed, including the effect of parasitic
components, transient and extreme operating conditions. The discussion builds from simple to more
complex problems starting with an overview of MOSFET technology and switching operation. Design
procedure for ground referenced and high side gate drive circuits, AC coupled and transformer isolated
solutions are described in great details. A special chapter deals with the gate drive requirements of the
MOSFETs in synchronous rectifier applications.
Several, step-by-step numerical design examples complement the paper.
INTRODUCTION
MOSFET – is an acronym for Metal Oxide
Semiconductor Field Effect Transistor and it is
the key component in high frequency, high
efficiency switching applications across the
electronics industry. It might be surprising, but
FET technology was invented in 1930, some 20
years before the bipolar transistor. The first
signal level FET transistors were built in the late
1950’s while power MOSFETs have been
available from the mid 70’s. Today, millions of
MOSFET transistors are integrated in modern
electronic components, from microprocessors,
through “discrete” power transistors.
The focus of this topic is the gate drive
requirements of the power MOSFET in various
switch mode power conversion applications.
MOSFET TECHNOLOGY
The bipolar and the MOSFET transistors exploit
the same operating principle. Fundamentally,
both type of transistors are charge controlled
devices which means that their output current is
proportional to the charge established in the
semiconductor by the control electrode. When
these devices are used as switches, both must be
driven from a low impedance source capable of
sourcing and sinking sufficient current to provide
for fast insertion and extraction of the controlling
charge. From this point of view, the MOSFETs
have to be driven just as “hard” during turn-on
and turn-off as a bipolar transistor to achieve
comparable switching speeds. Theoretically, the
switching speeds of the bipolar and MOSFET
devices are close to identical, determined by the
time required for the charge carriers to travel
across the semiconductor region. Typical values
in power devices are approximately 20 to 200
picoseconds depending on the size of the device.
The popularity and proliferation of MOSFET
technology for digital and power applications is
driven by two of their major advantages over the
bipolar junction transistors. One of these benefits
is the ease of use of the MOSFET devices in high
frequency switching applications. The MOSFET
transistors are simpler to drive because their
control electrode is isolated from the current
conducting silicon, therefore a continuous ON
current is not required. Once the MOSFET
transistors are turned-on, their drive current is
practically zero. Also, the controlling charge and
accordingly the storage time in the MOSFET
transistors is greatly reduced. This basically
2
eliminates the design trade-off between on state
voltage drop – which is inversely proportional to
excess control charge – and turn-off time. As a
result, MOSFET technology promises to use
much simpler and more efficient drive circuits
with significant economic benefits compared to
bipolar devices.
Furthermore, it is important to highlight
especially for power applications, that MOSFETs
have a resistive nature. The voltage drop across
the drain source terminals of a MOSFET is a
linear function of the current flowing in the
semiconductor. This linear relationship is
characterized by the RDS(on) of the MOSFET and
known as the on-resistance. On-resistance is
constant for a given gate-to-source voltage and
temperature of the device. As opposed to the
-2.2mV/°C temperature coefficient of a p-n
junction, the MOSFETs exhibit a positive
temperature coefficient of approximately
0.7%/°C to 1%/°C. This positive temperature
coefficient of the MOSFET makes it an ideal
candidate for parallel operation in higher power
applications where using a single device would
not be practical or possible. Due to the positive
TC of the channel resistance, parallel connected
MOSFETs tend to share the current evenly
among themselves. This current sharing works
automatically in MOSFETs since the positive TC
acts as a slow negative feedback system. The
device carrying a higher current will heat up
more – don’t forget that the drain to source
voltages are equal – and the higher temperature
will increase its RDS(on) value. The increasing
resistance will cause the current to decrease,
therefore the temperature to drop. Eventually, an
equilibrium is reached where the parallel
connected devices carry similar current levels.
Initial tolerance in RDS(on) values and different
junction to ambient thermal resistances can cause
significant – up to 30% – error in current
distribution.
Device types
Almost all manufacturers have got their unique
twist on how to manufacture the best power
MOSFETs, but all of these devices on the market
can be categorized into three basic device types.
These are illustrated in Figure 1.
n+ n+
n+ Substrate
n- EPI layer
GATE
SOURCE
DRAIN
p p
n+ n+
n+ Substrate
n- EPI layer
GATE
SOURCE
DRAIN
p+ p+
(a)
(b)
n+ n+
Substrate
p
GATE
SOURCE
DRAIN
p n
©
OXIDE
Figure 1. Power MOSFET device types
Double-diffused MOS transistors were
introduced in the 1970’s for power applications
and evolved continuously during the years. Using
polycrystalline silicon gate structures and selfaligning
processes, higher density integration and
rapid reduction in capacitances became possible.
The next significant advancement was offered by
the V-groove or trench technology to further
increase cell density in power MOSFET devices.
The better performance and denser integration
don’t come free however, as trench MOS devices
are more difficult to manufacture.
The third device type to be mentioned here is the
lateral power MOSFETs. This device type is
constrained in voltage and current rating due to
its inefficient utilization of the chip geometry.
Nevertheless, they can provide significant
benefits in low voltage applications, like in
microprocessor power supplies or as synchronous
rectifiers in isolated converters.
3
The lateral power MOSFETs have significantly
lower capacitances, therefore they can switch
much faster and they require much less gate drive
power.
MOSFET Models
There are numerous models available to illustrate
how the MOSFET works, nevertheless finding
the right representation might be difficult. Most
of the MOSFET manufacturers provide Spice
and/or Saber models for their devices, but these
models say very little about the application traps
designers have to face in practice. They provide
even fewer clues how to solve the most common
design challenges.
A really useful MOSFET model which would
describe all important properties of the device
from an application point of view would be very
complicated. On the other hand, very simple and
meaningful models can be derived of the
MOSFET transistor if we limit the applicability
of the model to certain problem areas.
The first model in Figure 2 is based on the actual
structure of the MOSFET device and can be used
mainly for DC analysis. The MOSFET symbol in
Figure 2a represents the channel resistance and
the JFET corresponds to the resistance of the
epitaxial layer. The length, thus the resistance of
the epi layer is a function of the voltage rating of
the device as high voltage MOSFETs require
thicker epitaxial layer.
Figure 2b can be used very effectively to model
the dv/dt induced breakdown characteristic of a
MOSFET. It shows both main breakdown
mechanisms, namely the dv/dt induced turn-on of
the parasitic bipolar transistor - present in all
power MOSFETs - and the dv/dt induced turn-on
of the channel as a function of the gate
terminating impedance. Modern power
MOSFETs are practically immune to dv/dt
triggering of the parasitic npn transistor due to
manufacturing improvements to reduce the
resistance between the base and emitter regions.
It must be mentioned also that the parasitic
bipolar transistor plays another important role. Its
base – collector junction is the famous body
diode of the MOSFET.
D
S
G
D
S
G
D
S
G
(a)
(b)
©
Figure 2. Power MOSFET models
4
Figure 2c is the switching model of the
MOSFET. The most important parasitic
components influencing switching performance
are shown in this model. Their respective roles
will be discussed in the next chapter which is
dedicated to the switching procedure of the
device.
MOSFET Critical Parameters
When switch mode operation of the MOSFET is
considered, the goal is to switch between the
lowest and highest resistance states of the device
in the shortest possible time. Since the practical
switching times of the MOSFETs (~10ns to 60ns)
is at least two to three orders of magnitude longer
than the theoretical switching time (~50ps to
200ps), it seems important to understand the
discrepancy. Referring back to the MOSFET
models in Figure 2, note that all models include
three capacitors connected between the three
terminals of the device. Ultimately, the switching
performance of the MOSFET transistor is
determined by how quickly the voltages can be
changed across these capacitors.
Therefore, in high speed switching applications,
the most important parameters are the parasitic
capacitances of the device. Two of these
capacitors, the CGS and CGD capacitors
correspond to the actual geometry of the device
while the CDS capacitor is the capacitance of the
base collector diode of the parasitic bipolar
transistor (body diode).
The CGS capacitor is formed by the overlap of the
source and channel region by the gate electrode.
Its value is defined by the actual geometry of the
regions and stays constant (linear) under different
operating conditions.
The CGD capacitor is the result of two effects.
Part of it is the overlap of the JFET region and
the gate electrode in addition to the capacitance
of the depletion region which is non-linear. The
equivalent CGD capacitance is a function of the
drain source voltage of the device approximated
by the following formula: