23-05-2012, 02:01 PM
Design and Implementation of Low Power
Design and Implementation of Low Power .pptx (Size: 910.63 KB / Downloads: 54)
Fault Tolerant Bipolar Logic Implementation in CMOS
The miniaturization of the device to nanoscale results in ultra high density on the cost of increased defect density.
Markov Random Field (MRF) based probabilistic approach is used to evaluate the device reliability in presence of high defect density. Both hard and soft errors are considered. Logic 1 is represented by [0.2 0.8] and logic 0 by [0.8 0.2].
N-Modular Redundancy (NMR) fault tolerant approach is compared at different levels of granularity and for varying level of N. Despite using NMR, the device is less fault tolerant in presence of high defects.
WHAT AND WHY CARBON NANOTUBE
Due to excessive increase in leakage current and uncontrollable process fluctuation, the phenomenal growth in conventional silicon technology is expected to slow down drastically in near future or eventually come to an end.
CNTFET are going to be a replacement for future CMOS devices.
Technical Details
It is a tubular form of carbon with diameter as small as 1nm. It is configurationally equivalent to a two dimensional graphene sheet rolled into a tube.
These tubes can be Single Walled (SWCNT) or Multi Walled (MWCNT).
Based on the operation, there are two types of carbon nanotube:-
1) Schottky barrier CNFET transistor.
2) Ballistic CNFET transistor.
Competitive Advantages
Comparison between the performance of CNTFET and MOSFET.
(i) In case of Si-MOSFET switching occurs by altering the channel resistivity but
for CNTFET switching occurs by the modulation of contact resistance.
(ii) CNTFET is capable of delivering three to four times higher drive currents than
the Si MOSFETs at an overdrive of 1 V due to high gate capacitance.
(iii) CNTFET has about four times higher transconductance in comparison to
MOSFET.
The average carrier velocity in CNTFET is almost double that in MOSFET.
Excellent thermal conductivities.
CNT circuit allows better scaling of the supply voltage (Vdd) for power reduction and also is 4 times more faster than CMOS.
Future work
LITERATURE REVIEW
Digital computation is performed on two-valued logic , i.e. there are only two possible values 0 or 1 in the Boolean space.
Multiple Value Logic(MVL) replaces the classical Boolean characterization of variables with either finitely or infinetly many values such as ternary logic or three valued logic.
MVL Circuits are generally operated in two modes:-
1) Voltage Mode Logic (VML)
2) Current Mode Logic (CML)