25-01-2013, 04:11 PM
Design of the 11011 Sequence Detector
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Do the Transitions for the Expected Sequence
Here is a partial drawing of the state diagram. It has only the sequence
expected. Note that the diagram returns to state C after a successful detection;
the final 11 are used again.
Note the labeling of the transitions: X /
Z. Thus the expected transition from A
to B has an input of 1 and an output of
The transition from E to C has an
output of 1 denoting that the desired
sequence has been detected
State A in the 11011 Sequence Detector
State A is the initial state. It is waiting on a 1.
If it gets a 0, the machine remains in state A and continues to remain
there while 0’s are input.
If it gets a 1, the machine moves to state B, but with output 0.
Assign a unique P-bit binary number (state vector) to each state.
The simplest way is to make the following assignments
A = 000
B = 001
C = 010
D = 011
E = 100
Here is a more interesting assignment.
States A and D are given even numbers. States B, C, and E are given odd
numbers. The assignment is as follows.
More on Overlap – What it is and What it is not
At this point, we need to focus more precisely on the idea of overlap in a
sequence detector. For an extended example here, we shall use a 1011 sequence
detector.
The next figure shows a partial state diagram for the sequence detector. The
final transitions from state D are not specified; this is intentional.
Here we focus on state C and the X=0
transition coming out of state D. By definition
of the system states,
State C – the last two bits were 10
State D – the last three bits were 101.