03-01-2013, 11:25 AM
HARDWARE IMPLEMENTATION OF FPGA USING DWT & IDWT PROCESSOR
HARDWARE IMPLEMENTATION.docx (Size: 390.53 KB / Downloads: 40)
ABSTRACT
In recent world, video and image compression have become very essential. There are many applications where we need to use different transform techniques to convert the signal or data in frequency domain. That’s why, availability of powerful software design tool is a fundamental requirement to take advantage of many advanced and specialized resources included in the latest devices. As we move in to the future there is a rising demand for high performance, high capacity and high bit rate wireless communication systems to integrate wide variety of communication services such as high-speed data, video and multimedia traffic. For example, in an OFDM scheme, a large number of orthogonal, overlapping, narrow band sub-channels or subcarriers, transmitted in parallel, divide the available transmission bandwidth. The separation of the subcarriers is theoretically minimal such that there is a very compact spectral utilization. DWT is faster than FFT hence it’s replaced by transform technique for OFDM. In this project we propose hardware for DWT- IDWT operation with the help of which directly our system hardware will take care of these operations and it will avoid the need of offline software tools for this. The main advantage of this is, it will increase the processing speed of many applications and it can be used in many embedded systems where some critical timing constraints are there. This project presents a novel vlsi architecture for DWT & IDWT operations using 5/3 legal integer wavelet. We propose to implement the architecture of DWT-IDWT processor and verify the results on Spartan 3E FPGA. We will use MODELSIM for the verification of functional results of our scheme. We will try and compare the results with other proposed designs. We propose to implement DWT-IDWT using Verilog HDL and it will be synthesized using Xilinx ISE.
INTRODUCTION
Implementation of DSP function in FPGA (Programmable Gate Arrays) has been a increasing trend in the last few years. Although for high performance applications ASICs and DSP chips have been the habitual solution ,now the technology implementation and the time to market are arresting new rules . So programmable DSP processors can be powerless to reach a desired performance due to their sequential-execution architecture, on the other hand, high development costs and time-to-market factors associated with ASICs can be prohibitive for certains applications . For this reasons, very attractive solution that balance high flexibility, time to market, cost and performance can be offered by FPGAs technology. Digital video techniques have been used for a number of years, for example in the television broadcasting industry. Therefore, for stored or transmitted, the digital video information has to be compressed. The growing demand for interactive multimedia technologies, in various application domains in this era of wireless and Internet communication, necessitated a number of desirable properties to be included in image and video compression algorithms. Accordingly, current and future generation image compression algorithms should not only demonstrate state-of-the-art performance, it should also provide desirable functionalities such as progressive transmission in terms of image fidelity as well as resolution, scalability, region-of-interest coding, random access, error resilience, handling large-size images of different types. To address and improve on weaknesses in the JPEG standard, a new image compression scheme called JPEG 2000 has recently been introduced. JPEG 2000 supports a rich set of features, including improved compression efficiency, optional lossless encoding, resolution and distortion (SNR) scalability, region of interest coding, and support for image editing on compressed images. Although they share the same name, JPEG 2000 is fundamentally different from the original JPEG standard. First, JPEG 2000 replaces the JPEG’s discrete cosine transform (DCT) frequency decomposition with a discrete wavelet transformation (DWT). The DWT is a multiresolution decomposition, which allows for resolution scalability within the embedded bit stream. In addition, the DWT exhibits better energy compaction than the DCT, allowing for superior compression efficiency. The DWT typically is applied on an image tile or on the entire image as a whole. This large scale application allows the DWT to minimize the blocking artefacts that plagued the 8x8 DCT in the original JPEG. The second major deviation of JPEG 2000 from its predecessor is the abandonment of the Huffman entropy encoding scheme for an adaptive binary arithmetic coder. The JPEG2000 algorithm has been developed based on the discrete wavelet transform (DWT) technique as opposed to the discrete cosine transform (DCT) based current JPEG. The nature of DWT helps to integrate both the lossless and lossy operations into the same algorithmic platform as well as it allows one to perform different kinds of progressive coding and decoding in the same algorithmic platform. Also the bit-plane coding of the transformed coefficients and the underlying structure of the bit stream syntax is very suitable to achieving different progressive operations during both encoding and decoding. [Ref.1, 2, 3 ]
DETAIL SUMMARY
WHY WAVELET ?
Wavelets are small wavelike signals with zero average value. It provides time verses frequency representation of any signal. It helps to represent an arbitrary function as a superposition of wavelets. Therefore Discrete Wavelet Transform is more accurate in analyzing images at different spatial frequencies than Fourier based transforms. [5]
DWT
Meaning of DWT – “Discrete Wavelet Transform”, transforms discrete signal from time domain into time-frequency domain. The transformation product is set of coefficients organized in the way that enables not only spectrum analyses of the signal, but also spectral behavior of the signal in time. This is achieved by decomposing signal, breaking it into two components, each caring information about source signal. Filters from the filter bank used for decomposition come in pairs: low pass and high pass. The filtering is succeeded by down sampling. Low pass filtered signal contains information about slow changing component of the signal, looking very similar to the original signal, only two times shorter in term of number of samples. High pass filtered signal contains information about fast changing component of the signal. In most cases high pass component is not so rich with data offering good property for compression. In some cases, such as audio or video signal, it is possible to discard some of the samples of the high pass component without noticing any significant changes in signal. Filters from the filter bank are called "wavelets". [6,7]
Lifting schemes of DWT
The lifting scheme is an efficient tool for constructing second generation wavelets, and has advantages such as faster implementation, fully in-place calculation, reversible integer-to-integer transforms, and so on. It is a structure that allows design and implementation of discrete wavelet transform. The lifting scheme has a few advantages over the classical implementation of the wavelet transforms: it offers faster implementation, and it easily implements reversible integer-to-integer wavelet transforms. Integer wavelet transforms when implemented via lifting scheme have better computational efficiency and lower memory requirements. Constructed entirely in spatial domain and based on the theory of biorthogonal wavelet filter banks with perfect reconstruction, lifting scheme can easily build up a gradually improved multi-resolution analysis through iterative primal lifting and dual lifting. It turns out that lifting scheme outperforms the classical especially in effective implementation, such as convenient construction, in-place calculation, lower computational complexity and simple inverse transform, etc. With lifting, we can also build wavelets with more vanishing moments and/or more smoothness, contributing to its flexible adaptivity and non-linearity. The lifting scheme consists of the following three steps to decompose the samples, namely, splitting, predicting, and updating. [7]
FPGA
A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing—hence "field-programmable". The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). The most common analog feature of the FPGA is programmable slew rate and drive strength on each output pin, allowing the engineer to set slow rates on lightly loaded pins that would otherwise ring unacceptably, and to set stronger, faster rates on heavily loaded pins on high-speed channels that would otherwise run too slow.
JPEG 2000
JPEG 2000 is an image compression standard and coding system. It was created by the Joint Photographic Experts Group committee in 2000 with the intention of superseding their original discrete cosine transform-based JPEG standard (created in 1992) with a newly designed, wavelet-based method. The standardized filename extension is .jp2 for ISO/IEC 15444-1 conforming files and .jpx for the extended part-2 specifications, published as ISO/IEC 15444-2. The registered MIME types are defined in RFC 3745. For ISO/IEC 15444-1 it is image/jp2.