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Description
The Si570 XO/Si571 VCXO utilizes Silicon Laboratories’ advanced DSPLL®
circuitry to provide a low-jitter clock at any frequency. The Si570/Si571 are userprogrammable
to any output frequency from 10 to 945 MHz and select frequencies
to 1400 MHz with <1 ppb resolution. The device is programmed via an I2C serial
interface. Unlike traditional XO/VCXOs where a different crystal is required for
each output frequency, the Si57x uses one fixed-frequency crystal and a DSPLL
clock synthesis IC to provide any-frequency operation. This IC-based approach
allows the crystal resonator to provide exceptional frequency stability and
reliability. In addition, DSPLL clock synthesis provides superior supply noise
rejection, simplifying the task of generating low-jitter clocks in noisy environments
typically found in communication systems.
Functional Description
The Si570 XO and the Si571 VCXO are low-jitter
oscillators ideally suited for applications requiring
programmable frequencies. The Si57x can be
programmed to generate virtually any output clock in
the range of 10 MHz to 1.4 GHz. Output jitter
performance complies with and exceeds the strict
requirements of high-speed communication systems
including OC-192/STM-64 and 10 Gigabit Ethernet
(10 GbE).
The Si57x consists of a digitally-controlled oscillator
(DCO) based on Silicon Laboratories' third-generation
DSPLL technology, which is driven by an internal fixedfrequency
crystal reference.
The device's default output frequency is set at the
factory and can be reprogrammed through the two-wire
I
2C serial port. Once the device is powered down, it will
return to its factory-set default output frequency.
While the Si570 outputs a fixed frequency, the Si571
has a pullable output frequency using the voltage
control input pin. This makes the Si571 an ideal choice
for high-performance, low-jitter, phase-locked loops.
3.1. Programming a New Output
Frequency
The output frequency (fout) is determined by
programming the DCO frequency (fDCO) and the
device's output dividers (HS_DIV, N1). The output
frequency is calculated using the following equation:
The DCO frequency is adjustable in the range of 4.85 to
5.67 GHz by setting the high-resolution 38-bit fractional
multiplier (RFREQ). The DCO frequency is the product
of the internal fixed-frequency crystal (fXTAL) and
RFREQ.
The 38-bit resolution of RFREQ allows the DCO
frequency to have a programmable frequency resolution
of 0.09 ppb.
3.3. Si570 Troubleshooting FAQ
1. Is the I2C bus working correctly and using the correct I2C address?
Probing the device I2C pins with an oscilloscope can sometimes reveal signal integrity problems. Si570/Si571 I2C
communication is normally very robust, so if other devices on the I2C bus are communicating successfully, then the
Si570/Si571 should also work.
You can confirm the specific I2C address expected by an Si570/Si571 device by using the part number lookup
utility available on the Silicon Laboratories web site.
http://www.silabscustom-timing
2. Is the correct register bank being written based on device stability?
Si570/Si571 devices use different configuration registers for 7 ppm temperature stability devices than they do for
20 ppm or 50 ppm temperature stability devices. The temperature stability of a Si570/Si571 device can be
confirmed using the part number lookup utility available on the Silicon Laboratories web site or by referencing the
2nd ordering option code in the part number.
http://www.silabscustom-timing
2nd Ordering Option Code:
A : 50 ppm temperature stability, 61.5 ppm total stability => Configuration Registers 7-12
B : 20 ppm temperature stability, 31.5 ppm total stability => Configuration Registers 7-12
C : 7 ppm temperature stability, 20 ppm total stability => Configuration Registers 13-18
3. Is the part-to-part variation in FXTAL included in calculations?
It is required that one determine the internal crystal frequency for each individual part before calculating a new
output frequency. The procedure for determining the internal crystal frequency from the register values of a device
is described elsewhere in this data sheet. See Section 3.2.
FXTAL = (FOUT x HSDIV x N1) / RFREQ <= note that RFREQ used here is the
register value divided by 2^28
It is a common error to calculate the internal crystal frequency for one device and then use that same crystal
frequency for all later devices. This will lead to offset errors in the output frequency accuracy from part-to-part. The
internal crystal frequency must be calculated for each individual device.
4. Is the Unfreeze to NewFreq timeout spec being exceeded?
The Si570/Si571 requires the DCO to be 'frozen' when changing register values and then 'unfrozen' and a
calibration initiated by writing the 'NewFreq' bit to restart it properly. If the 'unfreeze' and 'NewFreq' writes are
delayed by 10 ms or more, the internal state machine can timeout and cause the configuration to revert to default
values.
This 'unfreeze' and 'NewFreq' timing requirement is not usually a problem since the writes are done back-to-back,
but if there is an interrupt or other system delay that may cause this 10 ms timing to be exceeded, it should be
considered as a possible source of issues reprogramming the Si570/Si571.
Ordering Information
The Si570/Si571 supports a wide variety of options including frequency range, start-up frequency, temperature
stability, tuning slope, output format, and VDD. Specific device configurations are programmed into the Si570/Si571
at time of shipment. Configurations are specified using the Part Number Configuration chart shown below. Silicon
Labs provides a web browser-based part number configuration utility to simplify this process. Refer to
www.siliconlabsVCXOPartNumber to access this tool and for further ordering instructions. The Si570/Si571
XO/VCXO series is supplied in an industry-standard, RoHS compliant, 8-pad, 5 x 7 mm package. Tape and reel
packaging is an ordering option.