14-12-2012, 12:12 PM
Project report On BLOCK TRUNCATION IMAGE CODER IMPLEMENTATION ON TMS320C6713.
CODER IMPLEMENTATION.doc (Size: 103.5 KB / Downloads: 24)
ABSTRACT
Block truncation coding (BTC) is a successful image compression technique due to its simple and fast computational burden. The bit rate is fixed to 2.0 bits/pixel, whose performance is moderate in terms of compression ratio compared to other compression schemes such as discrete cosine transform (DCT), vector quantization (VQ), wavelet transform coding (WTC), etc. Two kinds of overheads are required for BTC coding: bit plane and quantization values, respectively. A new technique is presented to reduce the bit plane overhead. Conventional bit plane overhead is 1.0 bits/pixel; we decrease it to0.734 bits/pixel while maintaining the same decoded quality as absolute moment BTC (AMBTC) does for the "Lena" image. Compared to other published bit plane coding strategies, the proposed method outperforms all of the existing methods.
Block Truncation Coding (BTC) is a lossy image compression. In the simplest possible terms: BTC is a block-adaptive binary encoder scheme based on moment preserving quantization. The standard block truncation coding (BTC) technique is a simple block-based image compression, which preserves the block mean and the block standard deviation.
The basic BTC algorithm is a lossy fixed length compression method that uses a Q level quantiser to quantize a local region of the image. The quantiser levels are chosen such that a number of the moments of a local region in the image are preserved in the quantized output. In its simplest form, the objective of BTC is to preserve the sample mean and sample standard deviation of a grayscale image. Additional constraints can be added to preserve higher order moments. For this reason BTC is a block adaptive moment preserving quantiser.
INTRODUCTION
Block Truncation Coding, or BTC, is a type of lossy image compression technique for grayscale images. It divides the original images into blocks and then uses a quantiser to reduce the number of grey levels in each block whilst maintaining the same mean and standard deviation. Sub blocks of 4x4 pixels allow compression of about 25% assuming 8-bit integer values are used during transmission or storage. Larger blocks allow greater compression. However quality also reduces with the increase in block size due to the nature of the algorithm.
The TMS320C67x™ DSPs (including the TMS320C6713 devices compose the floating-point DSP generation in the TMS320C6000™ DSP platform. The C6713 device is based on the high-performance, advanced very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making this DSP an excellent choice for multichannel and multifunction applications.
TMS320C6713 is a Highest-Performance Floating-Point Digital Signal Processor (DSP) with a capability of Eight 32-Bit Instructions/Cycle execution. Operating at 225 MHz, the C6713C delivers up to 1350 million floating-point operations per second (MFLOPS), 1800 million instructions per second (MIPS), and with dual fixed-/floating-point multipliers up to 450 million multiply-accumulate operations per second (MMACS).The C6713 uses a two-level cache-based architecture and has a powerful and diverse set of peripherals.
In this project Block Truncation Coding image coder is going to implemented in the high performance 6713 DSP and the performance is going to be analyzed.