11-06-2013, 02:30 PM
SEMESTER EXAMINATIONS FOR DESIGN OF FAULT TOLERANT SYSTEMS
DESIGN OF FAULT.pdf (Size: 28.8 KB / Downloads: 19)
Answer any five questions
All questions carry equal marks
1.a) Differentiate Reliability and fault tolerance.
b) Why do we need fault-tolerance?
c) Explain fault Tolerant design of memory systems using error correcting codes.
2.a) Define the terms fault-secure and self testing of a circuit.
b) Design a two-level totally self checking checker for m-out-of-(2m+1),m>1. Using reddy’s procedure.
3.a) Explain with example OR-AND-OR Design for Testable Combinational logic Circuits.
b) Explain with example Design of Testable Combinational logic Circuits, using control logic.
4.a) Differentiate Scan Based testing and Functional testing.
b) Explain Scan based Design rules (LSSD).
5. Explain Memory Test architecture with example.
6. Distinguish between static and dynamic redundancy