21-06-2012, 04:32 PM
VHDL implementation of FFT/IFFT Blocks for OFDM
INTRODUCTION
Orthogonal Frequency Division Multiplexing (OFDM) has
recently become a key modulation technique for both
broadband wireless and wire-line applications [1], [2]. It has
been adopted for digital audio broadcasting (DAB) and digital
terrestrial television broadcasting (DVB) [3]. OFDM has also
been advocated for digital subscriber loop (DSL) and wireless
local area network (WLAN) applications [1],[ 4]. OFDM, also
known as multicarrier modulation (MCM), incorporates a large
number of orthogonally selected carriers to transmit a highdata-
rate stream in a parallel form in the frequency domain.
The problem of intersymbol- interference (ISI) introduced by a
multipath channel (this limits the bit rate of a conventional
single carrier system), is significantly reduced in OFDM owing
to the parallel, i.e. relatively low rate, data transmission
through multiple carriers. Also, the orthogonal nature of the
sub carriers in OFDM allows the sub carrier spectra to be
densely packed in the frequency domain resulting in a high
spectral efficiency. Spectral efficiency and multipath immunity
are two major features of OFDM.
THEORETICAL INFORMATION
In this Section, a brief overview of IFFT and FFT
algorithms is provided to be efficiently used in OFDM
systems. Specific attention is given to the decimation in
frequency (DIF) algorithm, which has been used to calculate
the outputs of both. Generally, we can use decimation in time
(DIT) algorithm also for the calculation. It depends upon the
choice of the programmer whether to use DIT or DIF as per his
convenience. FFT and IFFT algorithms are based on a specific
mathematical equations array. Certain data that are being
obtained from a signal are replaced in these equations to count
DFTs and owing to these equations; processes are counted very
fast than normal DFT equations.
RESULTS & CONCLUSIONS:
The simulation results for IFFT & FFT blocks implementations
is shown in figure 3 and figure 4 .The number of clock cycles
required [5] is reduced and both blocks gives the final outputs
as desired.