21-04-2012, 10:36 AM
VLSI project list
VLSI PROJECTS LIST.doc (Size: 6.39 KB / Downloads: 46)
A Low-Power Multiplier with the Spurious Power Suppression Technique FOR DSP
1)
Applications.
VLSI architecture for a Run-time Multi-precision Reconfigurable Booth Multiplier.
2)
FPGA Implementation of High Speed Scalable Encr yption Algorithm (SEA) for
3)
Secured Data Transmission.
Implementation of a Multi-channel UAR T Controller Based on FIFO Technique and
4)
FPGA.
A Robust UART Architecture Based on Recursive Running Sum Filter for Better
5)
Noise Performance.
A Symbol-Rate Timing Synchronization Method for Low Power Wireless OFDM
6)
Systems.
FPGA Based Design of a Novel Enhanced Error Detection and Correction Technique
7)
for High Speed Serial Communication Applications.
Implementation of IEEE 802.11 a WLAN Baseband Processor.
8)
An Effective Fast and Small-Area Parallel-Pipeline Architecture for OTM
9)
convolution Encoders
Improvement of the Orthogonal Code Convolution Capabilities Using FPGA
10)
Implementation
A New VLSI Architecture of Parallel Multiplier–Accumulator Based on Radix-2
11)
Modified Booth Algorithm.
Design of High-performance Low Power Floating-point Fused Multiply-Add (FAM)
12)
for Scientific Applications
Design Of High-Speed 32-Bit Signed/Unsigned Pipelined Multiplier
13)
FPGA Implementations of the Hummingbird Cryptographic Algorithm
14)
An Efficient Implementation of Floating Point Multiplier for DSP APPLICATIONS
15)