05-07-2012, 09:57 AM
New Thyristor Gate Control: Implementation Report
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Introduction:
This document describes the Hardware and Software that has been created in the context of the “New Thyristor Gate Control for the Main Power Supply” Project.
The description of the different elements has been organised around the physical cards themselves, that is, for every card that composes the system, there is a description of the hardware and software that can be found in it.
FPGAs
The two FPGAs used are the Xilinx XCS10-4VQ100C and the XCS20XL-4PQ208C
One of the FPGA devices is used in the implementation of the Thyristor Gate Control (TGC), and the other is used to interface the DSP to the G64bus and to the DAQ card.
On board software
DSP
The heart of the new thyristor Gate Control System is the DSP as it is in it that the new synchronism method is implemented. The DSP is programmed in a mixture of C (90%) and assembly (10%) using the Tasking Development Tools. The project is called “tgc_project” and can be found in:
ealdaz/public/TGC_PROJECT
The main file for the “Tgc_project” is called “Tgc_v6_1.c”, it acquires the mains synchronism voltage and with it it calculates the exact instantaneous phase. From the value of this phase and the value of the firing angle alpha, it generates a high frequency (3.2kHz) pulse train synchronous to the mains frequency and a pulse that corresponds to the alpha = 0 crossing for thyristor 1. A Dataflow diagram of the program is shown in Figure 4.
A Dataflow diagram [6] is a schematic representation of a software system. Circles represent processes or procedures, parallel lines depict data storage areas, and squares represent producers or consumers of data such as hardware devices. Directed arcs are used to indicate the unidirectional flow of data between the components of the graph.
Phase-to-frequency conversion
The phase to frequency conversion, shown in as a white circle, is in turn, of paramount importance to the precision of the synchronism algorithm.
Figure 5
Using the estimated angle information, it is possible to generate a square wave synchronous with it. This signal will be introduced in the PLL in order to synchronize the TGC [1] .The implemented approach to create the square wave is a ramp-comparison strategy.
DPRAM Memory layout
As mentioned earlier the DPRAM is used to transmit data from the PC to the DSP and vice versa.
This memory is divided into two areas: one for the data that flows from the PC to the DSP, and another, larger one, for the data that goes from the PC to the DSP. The definition of the different registers can be found in the header file ‘dpram.h’.
Driver cards
There are two driver cards connected to the DSP, Figure 1, and they are used to produce the necessary firing pulses for the thyristors. Each firing pulse for the thyristor can be produced in one of two different ways: either directly from a Mosfet for use with pulse transformers or from an optocoupled output that will be used for the main power supply of the PS. There is one card per 12-pulse converter and each card has twelve outputs, one per thyristor.
Mains synch voltage divider card
This divider reduces the voltage of the mains from 540Vpeak (380Vrms) to 10Vpeak, a level acceptable by the TGC chassis electronics. The mains synch voltage that arrives to the TGC chassis comes from a 4800Vrms-to-380Vrms transformer.
Test System
In order to test the system a 1kVA-100V-10A twelve-pulse thyristor rectifier was designed and commissioned the 11th February 2002. Its topology is that of the main power supply, that is, a 12 pulse-thyristor-rectifier constituted by two power transformers (polygon-star). The primary of each transformer is connected to the mains network. A 30 degrees dephasing between the 2 secondaries star exists due to the particular primary connections of the transformers. These two transformers have the same ratio transformer for each 6 pulses rectifier and also the same output impedance than the ones used in the MPS. Each transformer secondary is connected to a 6 pulses thyristor bridge. These two bridges are connected in series. The detailed power supply specifications can be found in [2].