04-04-2012, 01:20 PM
EIGHT BIT MULTIPLICATION
EIGHT BIT MULTIPLICATION.doc (Size: 36.5 KB / Downloads: 33)
AIM:
To write a verilog program for multiplying two eight bit numbers using Spartan-3E kit.
APPARATUS REQUIRED:
• XILINX ISE 9.2i software
• PC with windows-XP
• FPGA board(SPARTAN-3E kit)
ALGORITHM:
• Create a verilog file.
• Assign port names.
• Write verilog program.
• Check syntax.
• Create UCF file.
• Assign package pins.
• Connect the Spartan 3E kit using JTag port and configure the device.
• Check on the shift and select program to download the program to FPGA.
• After the program is downloaded check the output using switches and LEDs.
THEORY:
• Assign the clock input to clk and set values to multiplier and multiplicand.
• Check the multiplier &multiplicand are positive, then do the successive addition for the product.
• Otherwise multiplier is positive and multiplicand is negative, then do the successive addition but in successive addition, MSB is replaced by ‘1’ instead of ‘0’.
• If multiplier is negative and multiplicand is positive, then take 2’s compliment of the multiplicand and do the successive addition for that multiplicand.
• If both multiplier &multiplicand are negative, then take 2’s compliment of the multiplicand and do the successive addition, but MSB is replaced by ‘1’ instead of ‘0’.
PROGRAM:
Code:
module mul8bit(clk, mr, md, p);
input clk;
input [7:0] mr; // 8-bit signed bit
input [7:0] md; // 8-bit signed bit
output [15:0] p;
reg [15:0] p;
reg [4:0] sig = 5'b00000; //00000
reg [8:0] mdcom = 9'b000000000;
reg [16:0] q0 = 17'b00000000000000000 ;
reg [16:0] pq = 17'b00000000000000000 ;
always @ (posedge clk)
begin
if ((mr[7] == 1'b0) & (md[7] == 1'b0)) begin// multiplier & multiplicand are positive
if (sig == 5'b00000) begin // this is simplmultiplication
q0 <= {9'b000000000, mr};
end
else if (sig <= 5'b10000) begin
if (q0[0] == 1'b1) begin
pq <= q0 + {1'b0, md, 8'b00000000};
end
else if (q0[0] == 1'b0) begin
pq <= q0;
end
q0 <= {1'b0, pq[16:1]};
end
else begin
p <= q0[15:0];
sig <= 5'b00000;
end
sig <= sig + 1;
end
else if ((mr[7] == 1'b0) & (md[7] == 1'b1)) begin// multiplier is positive
if (sig == 5'b00000) begin //&multiplicand is negative
q0 <= {9'b000000000, mr};
end
else if (sig <= 5'b10000) begin
f (q0[0] == 1'b1) begin
pq <= q0 + {1'b1, md, 8'b00000000};
end
else if (q0[0] == 1'b0) begin
pq <= q0;
end
q0 <= {1'b1, pq[16:1]}; // MSB is replaced by '1'
end
else begin
p <= q0[15:0];
sig <= 5'b00000;
end
sig <= sig + 1;
end
else if ((mr[7] == 1'b1) & (md[7] == 1'b0)) begin// multiplier is negative
// & multiplicand is positive
mdcom <= 100000000 - {1'b0, md}; // 2's complement of the multiplicand
if (sig == 5'b00000) begin // and it is added to final value
q0 <= {9'b000000000, mr};
end
else if (sig <= 5'b10000) begin
if (q0[0] == 1'b1) begin
pq <= q0 + {1'b0, md, 8'b00000000};
end
else if (q0[0] == 1'b0) begin
pq <= q0;
end
q0 <= {1'b0, pq[16:1]};
end
else begin
p <= q0[15:0] + {mdcom[7:0], 8'b00000000};
sig <= 5'b00000;
end
sig <= sig + 1;
end
else begin // multiplier & multiplicand are negative
mdcom <= 100000000 - {1'b0, md};
if (sig == 5'b00000) begin
q0 <= {9'b000000000, mr};
end
else if (sig <= 5'b10000) begin
if (q0[0] == 1'b1) begin
pq <= q0 + {1'b1, md, 8'b00000000};
end
else if (q0[0] == 1'b0) begin
pq <= q0;
end
q0 <= {1'b1, pq[16:1]};
end
else begin
p <= q0[15:0] + {mdcom[7:0], 8'b00000000};
sig <= 5'b00000;
end
sig <= sig + 1;
end
end
endmodule
RESULT:
Thus the program for multiplying two 8-bit numbers was executed and the result was verified using Spartan-3E kit.