The fully pipeline FPGA implementation of AES Encryption and Decryption (also known as the Rijndael Algorithm), which has been selected as the New Algorithm by the National Standards and Technology Institutes (NIST) as US FIPS PUB 197 in November 2001 after a 5-year standardization process. The AES encryption and decryption algorithm is implemented in the FPGA. This has to have an interface with the PC. The C source for encryption and decryption is now available. The algorithm is implemented to work in software and this is our reference implementation. The application works as follows. The file will be encrypted in software and transferred to the machine containing the FPGA. The file will be decrypted in hardware on that machine. Also the file must be encrypted in hardware and decrypted in software. Our design focuses primarily on acceleration along with the optimization of the silicon area.