30-06-2022, 08:02 PM
implementation of soc's uart in vlsi .pdf (Size: 1.53 MB / Downloads: 0)
I.INTRODUCTION
The UART (universal asynchronous receiver and transmitter) module provides asynchronous serial communication with external devices such as modems and other computers. The UART can be used to control the process of breaking parallel data from the PC down into serial data that can be transmitted and vice versa for receiving data. The UART allows the devices to communicate without the need to be synchronised. UART is a popular method of serial asynchronous communication. Typically, the UART is connected between a processor and a peripheral. To the processor, the UART appears as an 8-bit read-write parallel port that performs serial- to-parallel conversions for the processor, and vice versa for the peripheral. The UART allows reliable data transfer at high speeds with its 16-byte first in, first out (FIFO) input register. The FIFO feature can buffer up to 16 bytes at a time, which improves serial communications by preventing data overruns in applications. The implementation of UART the serial communication is done with high data rate and no interrupts. The UART 16550 serial communication interface device receives data and converts data from serial to parallel, where as the transmitter performs parallel to serial conversion. This thesis portrays a novel architecture of Universal Asynchronous Receiver Transmitter. UARTs are used for asynchronous serial data communication between remote embedded systems. The UART is for interfacing computers or microprocessors to an asynchronous serial data channel. The receiver converts serial start, data, parity and stop bits. The transmitter converts parallel data into serial form and automatically adds start, parity and stop bits. The data word length can be 5, 6, 7 or 8 bits. Parity may be odd or even. Parity checking and generation can be inhibited